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<div class="header">
  <div class="summary">
<a href="#define-members">Macros</a>  </div>
  <div class="headertitle">
<div class="title">SFDP Macros<div class="ingroups"><a class="el" href="group__group__smif.html">SMIF         (Serial Memory Interface)</a> &raquo; <a class="el" href="group__group__smif__macros.html">Macros</a></div></div>  </div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:ga99bd2142f674919944bb11efdeda2b49"><td class="memItemLeft" align="right" valign="top"><a id="ga99bd2142f674919944bb11efdeda2b49"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga99bd2142f674919944bb11efdeda2b49">CY_SMIF_SFDP_ADDRESS_LENGTH</a>&#160;&#160;&#160;(0x03U)</td></tr>
<tr class="memdesc:ga99bd2142f674919944bb11efdeda2b49"><td class="mdescLeft">&#160;</td><td class="mdescRight">The length of the SFDP address. <br /></td></tr>
<tr class="separator:ga99bd2142f674919944bb11efdeda2b49"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab5af1614c968fbbf26efdd059ece644e"><td class="memItemLeft" align="right" valign="top"><a id="gab5af1614c968fbbf26efdd059ece644e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab5af1614c968fbbf26efdd059ece644e">CY_SMIF_SFDP_PARAM_HEADER_LENGTH</a>&#160;&#160;&#160;(0x8U)</td></tr>
<tr class="memdesc:gab5af1614c968fbbf26efdd059ece644e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The length of the Parameter header. <br /></td></tr>
<tr class="separator:gab5af1614c968fbbf26efdd059ece644e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd27dae7a16538c9c82f8d3ecb70c521"><td class="memItemLeft" align="right" valign="top"><a id="gadd27dae7a16538c9c82f8d3ecb70c521"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gadd27dae7a16538c9c82f8d3ecb70c521">CY_SMIF_SFDP_PARAMETER_TABLE_LENGTH</a>&#160;&#160;&#160;(0x80U)</td></tr>
<tr class="memdesc:gadd27dae7a16538c9c82f8d3ecb70c521"><td class="mdescLeft">&#160;</td><td class="mdescRight">The length of the Parameter table. <br /></td></tr>
<tr class="separator:gadd27dae7a16538c9c82f8d3ecb70c521"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf33360787d3ef321069f139ade367f49"><td class="memItemLeft" align="right" valign="top"><a id="gaf33360787d3ef321069f139ade367f49"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf33360787d3ef321069f139ade367f49">CY_SMIF_SFDP_LENGTH</a>&#160;&#160;&#160;(<a class="el" href="group__group__smif__macros__sfdp.html#gadd27dae7a16538c9c82f8d3ecb70c521">CY_SMIF_SFDP_PARAMETER_TABLE_LENGTH</a>)</td></tr>
<tr class="memdesc:gaf33360787d3ef321069f139ade367f49"><td class="mdescLeft">&#160;</td><td class="mdescRight">The length of the SFDP. <br /></td></tr>
<tr class="separator:gaf33360787d3ef321069f139ade367f49"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1453d020a9d108e42e8ee54226484141"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1453d020a9d108e42e8ee54226484141">CY_SMIF_SFDP_SIGNATURE_BYTE_00</a>&#160;&#160;&#160;(0x00U)</td></tr>
<tr class="memdesc:ga1453d020a9d108e42e8ee54226484141"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Signature byte 0x00.  <a href="#ga1453d020a9d108e42e8ee54226484141">More...</a><br /></td></tr>
<tr class="separator:ga1453d020a9d108e42e8ee54226484141"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d1419f86779c2a0166142b985e2dbf6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4d1419f86779c2a0166142b985e2dbf6">CY_SMIF_SFDP_SIGNATURE_BYTE_01</a>&#160;&#160;&#160;(0x01U)</td></tr>
<tr class="memdesc:ga4d1419f86779c2a0166142b985e2dbf6"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Signature byte 0x01.  <a href="#ga4d1419f86779c2a0166142b985e2dbf6">More...</a><br /></td></tr>
<tr class="separator:ga4d1419f86779c2a0166142b985e2dbf6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ab446e14424e00ea85a9ae1ff812580"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga9ab446e14424e00ea85a9ae1ff812580">CY_SMIF_SFDP_SIGNATURE_BYTE_02</a>&#160;&#160;&#160;(0x02U)</td></tr>
<tr class="memdesc:ga9ab446e14424e00ea85a9ae1ff812580"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Signature byte 0x02.  <a href="#ga9ab446e14424e00ea85a9ae1ff812580">More...</a><br /></td></tr>
<tr class="separator:ga9ab446e14424e00ea85a9ae1ff812580"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga484207a690e23be78908f64f2a62693e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga484207a690e23be78908f64f2a62693e">CY_SMIF_SFDP_SIGNATURE_BYTE_03</a>&#160;&#160;&#160;(0x03U)</td></tr>
<tr class="memdesc:ga484207a690e23be78908f64f2a62693e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Signature byte 0x03.  <a href="#ga484207a690e23be78908f64f2a62693e">More...</a><br /></td></tr>
<tr class="separator:ga484207a690e23be78908f64f2a62693e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf4b7ccd5f4cc2072dc86e156636711f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf4b7ccd5f4cc2072dc86e156636711f6">CY_SMIF_SFDP_MINOR_REV</a>&#160;&#160;&#160;(0x04U)</td></tr>
<tr class="memdesc:gaf4b7ccd5f4cc2072dc86e156636711f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Header byte 0x04.  <a href="#gaf4b7ccd5f4cc2072dc86e156636711f6">More...</a><br /></td></tr>
<tr class="separator:gaf4b7ccd5f4cc2072dc86e156636711f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6303482034d832e3571ad9bb8887b853"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga6303482034d832e3571ad9bb8887b853">CY_SMIF_SFDP_MAJOR_REV</a>&#160;&#160;&#160;(0x05U)</td></tr>
<tr class="memdesc:ga6303482034d832e3571ad9bb8887b853"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Header byte 0x05.  <a href="#ga6303482034d832e3571ad9bb8887b853">More...</a><br /></td></tr>
<tr class="separator:ga6303482034d832e3571ad9bb8887b853"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d9d8ff78c3e2f7f773d0172edaa030d"><td class="memItemLeft" align="right" valign="top"><a id="ga7d9d8ff78c3e2f7f773d0172edaa030d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga7d9d8ff78c3e2f7f773d0172edaa030d">CY_SMIF_SFDP_MAJOR_REV_1</a>&#160;&#160;&#160;(0x01U)</td></tr>
<tr class="memdesc:ga7d9d8ff78c3e2f7f773d0172edaa030d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Major Revision is 1. <br /></td></tr>
<tr class="separator:ga7d9d8ff78c3e2f7f773d0172edaa030d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga94957a9260fcb48b8b74ce0e03f553c9"><td class="memItemLeft" align="right" valign="top"><a id="ga94957a9260fcb48b8b74ce0e03f553c9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga94957a9260fcb48b8b74ce0e03f553c9">CY_SMIF_SFDP_JEDEC_REV_0</a>&#160;&#160;&#160;(0x00U)</td></tr>
<tr class="memdesc:ga94957a9260fcb48b8b74ce0e03f553c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The JEDEC JESD216 Revision is 0. <br /></td></tr>
<tr class="separator:ga94957a9260fcb48b8b74ce0e03f553c9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga34df2b1a68dd595936764ac4396a2dab"><td class="memItemLeft" align="right" valign="top"><a id="ga34df2b1a68dd595936764ac4396a2dab"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga34df2b1a68dd595936764ac4396a2dab">CY_SMIF_SFDP_JEDEC_REV_B</a>&#160;&#160;&#160;(0x06U)</td></tr>
<tr class="memdesc:ga34df2b1a68dd595936764ac4396a2dab"><td class="mdescLeft">&#160;</td><td class="mdescRight">The JEDEC JESD216 Revision is B. <br /></td></tr>
<tr class="separator:ga34df2b1a68dd595936764ac4396a2dab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b764687c78e7ce71bed89e5f997e95e"><td class="memItemLeft" align="right" valign="top"><a id="ga2b764687c78e7ce71bed89e5f997e95e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga2b764687c78e7ce71bed89e5f997e95e">CY_SMIF_SFDP_PARAM_TABLE_PTR</a>&#160;&#160;&#160;(0x0CU)</td></tr>
<tr class="memdesc:ga2b764687c78e7ce71bed89e5f997e95e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Specifies the start of the JEDEC Basic Flash Parameter Table in the SFDP structure. <br /></td></tr>
<tr class="separator:ga2b764687c78e7ce71bed89e5f997e95e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0be772038040081cfb1da6674c19f56"><td class="memItemLeft" align="right" valign="top"><a id="gad0be772038040081cfb1da6674c19f56"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gad0be772038040081cfb1da6674c19f56">CY_SMIF_SFDP_THREE_BYTES_ADDR_CODE</a>&#160;&#160;&#160;(0x00U)</td></tr>
<tr class="memdesc:gad0be772038040081cfb1da6674c19f56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Code for the SFDP Address Bytes Number 3. <br /></td></tr>
<tr class="separator:gad0be772038040081cfb1da6674c19f56"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab85f733efd25783719a87875650545af"><td class="memItemLeft" align="right" valign="top"><a id="gab85f733efd25783719a87875650545af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab85f733efd25783719a87875650545af">CY_SMIF_SFDP_THREE_OR_FOUR_BYTES_ADDR_CODE</a>&#160;&#160;&#160;(0x01U)</td></tr>
<tr class="memdesc:gab85f733efd25783719a87875650545af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Code for the SFDP Address Bytes Number 3 or 4. <br /></td></tr>
<tr class="separator:gab85f733efd25783719a87875650545af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga049727f7dac1cda518432827b06f27b7"><td class="memItemLeft" align="right" valign="top"><a id="ga049727f7dac1cda518432827b06f27b7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga049727f7dac1cda518432827b06f27b7">CY_SMIF_SFDP_FOUR_BYTES_ADDR_CODE</a>&#160;&#160;&#160;(0x02U)</td></tr>
<tr class="memdesc:ga049727f7dac1cda518432827b06f27b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Code for the SFDP Address Bytes Number 4. <br /></td></tr>
<tr class="separator:ga049727f7dac1cda518432827b06f27b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga92c67dd57f18d2b15c16640b375c7c8d"><td class="memItemLeft" align="right" valign="top"><a id="ga92c67dd57f18d2b15c16640b375c7c8d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga92c67dd57f18d2b15c16640b375c7c8d">CY_SMIF_THREE_BYTES_ADDR</a>&#160;&#160;&#160;(0x03U)</td></tr>
<tr class="memdesc:ga92c67dd57f18d2b15c16640b375c7c8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The address Bytes Number is 3. <br /></td></tr>
<tr class="separator:ga92c67dd57f18d2b15c16640b375c7c8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga59475a6d96fad221c150178e0b7a65ed"><td class="memItemLeft" align="right" valign="top"><a id="ga59475a6d96fad221c150178e0b7a65ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga59475a6d96fad221c150178e0b7a65ed">CY_SMIF_FOUR_BYTES_ADDR</a>&#160;&#160;&#160;(0x04U)</td></tr>
<tr class="memdesc:ga59475a6d96fad221c150178e0b7a65ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">The address Bytes Number is 4. <br /></td></tr>
<tr class="separator:ga59475a6d96fad221c150178e0b7a65ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafc4f88015cd07194ef58f777e4eb16a4"><td class="memItemLeft" align="right" valign="top"><a id="gafc4f88015cd07194ef58f777e4eb16a4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gafc4f88015cd07194ef58f777e4eb16a4">CY_SMIF_READ_MODE_BYTE</a>&#160;&#160;&#160;(0x5AU)</td></tr>
<tr class="memdesc:gafc4f88015cd07194ef58f777e4eb16a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">The mode byte for the SMIF read. <br /></td></tr>
<tr class="separator:gafc4f88015cd07194ef58f777e4eb16a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga41b761ea981faa99ad68f08bf78ade68"><td class="memItemLeft" align="right" valign="top"><a id="ga41b761ea981faa99ad68f08bf78ade68"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga41b761ea981faa99ad68f08bf78ade68">CY_SMIF_WRITE_STATUS_REG1_CMD</a>&#160;&#160;&#160;(0x01U)</td></tr>
<tr class="memdesc:ga41b761ea981faa99ad68f08bf78ade68"><td class="mdescLeft">&#160;</td><td class="mdescRight">The write status register 1 command. <br /></td></tr>
<tr class="separator:ga41b761ea981faa99ad68f08bf78ade68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae65f1af360b344bebc38d526e01e34bb"><td class="memItemLeft" align="right" valign="top"><a id="gae65f1af360b344bebc38d526e01e34bb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae65f1af360b344bebc38d526e01e34bb">CY_SMIF_SINGLE_PROGRAM_CMD</a>&#160;&#160;&#160;(0x02U)</td></tr>
<tr class="memdesc:gae65f1af360b344bebc38d526e01e34bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a single SMIF program. <br /></td></tr>
<tr class="separator:gae65f1af360b344bebc38d526e01e34bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08f29f5b9f079cde05fa6dd12830211d"><td class="memItemLeft" align="right" valign="top"><a id="ga08f29f5b9f079cde05fa6dd12830211d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga08f29f5b9f079cde05fa6dd12830211d">CY_SMIF_SINGLE_READ_CMD</a>&#160;&#160;&#160;(0x03U)</td></tr>
<tr class="memdesc:ga08f29f5b9f079cde05fa6dd12830211d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a single SMIF read. <br /></td></tr>
<tr class="separator:ga08f29f5b9f079cde05fa6dd12830211d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga036c4b10c7073be863b6de10e32f6165"><td class="memItemLeft" align="right" valign="top"><a id="ga036c4b10c7073be863b6de10e32f6165"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga036c4b10c7073be863b6de10e32f6165">CY_SMIF_WRITE_DISABLE_CMD</a>&#160;&#160;&#160;(0x04U)</td></tr>
<tr class="memdesc:ga036c4b10c7073be863b6de10e32f6165"><td class="mdescLeft">&#160;</td><td class="mdescRight">The Write Disable command. <br /></td></tr>
<tr class="separator:ga036c4b10c7073be863b6de10e32f6165"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c6e0587db22b8cd2c905a538c78d973"><td class="memItemLeft" align="right" valign="top"><a id="ga4c6e0587db22b8cd2c905a538c78d973"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4c6e0587db22b8cd2c905a538c78d973">CY_SMIF_READ_STATUS_REG1_CMD</a>&#160;&#160;&#160;(0x05U)</td></tr>
<tr class="memdesc:ga4c6e0587db22b8cd2c905a538c78d973"><td class="mdescLeft">&#160;</td><td class="mdescRight">The read status register 1 command. <br /></td></tr>
<tr class="separator:ga4c6e0587db22b8cd2c905a538c78d973"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f09eba257bc4c7aaf7ee4ca6c2a5bbf"><td class="memItemLeft" align="right" valign="top"><a id="ga8f09eba257bc4c7aaf7ee4ca6c2a5bbf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga8f09eba257bc4c7aaf7ee4ca6c2a5bbf">CY_SMIF_WRITE_ENABLE_CMD</a>&#160;&#160;&#160;(0x06U)</td></tr>
<tr class="memdesc:ga8f09eba257bc4c7aaf7ee4ca6c2a5bbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">The Write Enable command. <br /></td></tr>
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<tr class="memitem:ga0948eed97b73aaae31e3ee6721654889"><td class="memItemLeft" align="right" valign="top"><a id="ga0948eed97b73aaae31e3ee6721654889"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga0948eed97b73aaae31e3ee6721654889">CY_SMIF_READ_STATUS_REG2_T1_CMD</a>&#160;&#160;&#160;(0x35U)</td></tr>
<tr class="memdesc:ga0948eed97b73aaae31e3ee6721654889"><td class="mdescLeft">&#160;</td><td class="mdescRight">The read status register 2 type 1 command. <br /></td></tr>
<tr class="separator:ga0948eed97b73aaae31e3ee6721654889"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf2556c829eee2e3480e1f01c15e8d808"><td class="memItemLeft" align="right" valign="top"><a id="gaf2556c829eee2e3480e1f01c15e8d808"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf2556c829eee2e3480e1f01c15e8d808">CY_SMIF_WRITE_STATUS_REG2_T1_CMD</a>&#160;&#160;&#160;(0x3EU)</td></tr>
<tr class="memdesc:gaf2556c829eee2e3480e1f01c15e8d808"><td class="mdescLeft">&#160;</td><td class="mdescRight">The write status register 2 type 1 command. <br /></td></tr>
<tr class="separator:gaf2556c829eee2e3480e1f01c15e8d808"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6038a7ff66ca14b9da1978cc4a1cf0a7"><td class="memItemLeft" align="right" valign="top"><a id="ga6038a7ff66ca14b9da1978cc4a1cf0a7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga6038a7ff66ca14b9da1978cc4a1cf0a7">CY_SMIF_WRITE_STATUS_REG2_T2_CMD</a>&#160;&#160;&#160;(0x31U)</td></tr>
<tr class="memdesc:ga6038a7ff66ca14b9da1978cc4a1cf0a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The write status register 2 type 2 command. <br /></td></tr>
<tr class="separator:ga6038a7ff66ca14b9da1978cc4a1cf0a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga238b651f7d106f5f08cb2b9e4d511517"><td class="memItemLeft" align="right" valign="top"><a id="ga238b651f7d106f5f08cb2b9e4d511517"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga238b651f7d106f5f08cb2b9e4d511517">CY_SMIF_READ_STATUS_REG2_T2_CMD</a>&#160;&#160;&#160;(0x3FU)</td></tr>
<tr class="memdesc:ga238b651f7d106f5f08cb2b9e4d511517"><td class="mdescLeft">&#160;</td><td class="mdescRight">The read status register 2 type 2 command. <br /></td></tr>
<tr class="separator:ga238b651f7d106f5f08cb2b9e4d511517"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9212e9186a98ccc18429df554a7ee9a1"><td class="memItemLeft" align="right" valign="top"><a id="ga9212e9186a98ccc18429df554a7ee9a1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga9212e9186a98ccc18429df554a7ee9a1">CY_SMIF_CHIP_ERASE_CMD</a>&#160;&#160;&#160;(0x60U)</td></tr>
<tr class="memdesc:ga9212e9186a98ccc18429df554a7ee9a1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The Chip Erase command. <br /></td></tr>
<tr class="separator:ga9212e9186a98ccc18429df554a7ee9a1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49e09ff5bef2279dc426ce8c35a52442"><td class="memItemLeft" align="right" valign="top"><a id="ga49e09ff5bef2279dc426ce8c35a52442"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga49e09ff5bef2279dc426ce8c35a52442">CY_SMIF_POWER_DOWN_CMD</a>&#160;&#160;&#160;(0xB9U)</td></tr>
<tr class="memdesc:ga49e09ff5bef2279dc426ce8c35a52442"><td class="mdescLeft">&#160;</td><td class="mdescRight">The Power-down command. <br /></td></tr>
<tr class="separator:ga49e09ff5bef2279dc426ce8c35a52442"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga84f91bbc6e2902da4a726446fcd4e067"><td class="memItemLeft" align="right" valign="top"><a id="ga84f91bbc6e2902da4a726446fcd4e067"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga84f91bbc6e2902da4a726446fcd4e067">CY_SMIF_RELEASE_POWER_DOWN_CMD</a>&#160;&#160;&#160;(0xABU)</td></tr>
<tr class="memdesc:ga84f91bbc6e2902da4a726446fcd4e067"><td class="mdescLeft">&#160;</td><td class="mdescRight">The Release Power-down command. <br /></td></tr>
<tr class="separator:ga84f91bbc6e2902da4a726446fcd4e067"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa76d00c38b3a1f63f81aaa0275cf5557"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa76d00c38b3a1f63f81aaa0275cf5557">CY_SMIF_QE_BIT_STATUS_REG2_T1</a>&#160;&#160;&#160;(0x02U)</td></tr>
<tr class="memdesc:gaa76d00c38b3a1f63f81aaa0275cf5557"><td class="mdescLeft">&#160;</td><td class="mdescRight">The QE bit is in status register 2 type 1.  <a href="#gaa76d00c38b3a1f63f81aaa0275cf5557">More...</a><br /></td></tr>
<tr class="separator:gaa76d00c38b3a1f63f81aaa0275cf5557"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3608256a56ba53796f7e53480f19e76"><td class="memItemLeft" align="right" valign="top"><a id="gae3608256a56ba53796f7e53480f19e76"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae3608256a56ba53796f7e53480f19e76">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_1S</a>&#160;&#160;&#160;(0x0CU)</td></tr>
<tr class="memdesc:gae3608256a56ba53796f7e53480f19e76"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-1S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:gae3608256a56ba53796f7e53480f19e76"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae5144ae9b86034bb3544fae58d1958bc"><td class="memItemLeft" align="right" valign="top"><a id="gae5144ae9b86034bb3544fae58d1958bc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae5144ae9b86034bb3544fae58d1958bc">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_2S</a>&#160;&#160;&#160;(0x3CU)</td></tr>
<tr class="memdesc:gae5144ae9b86034bb3544fae58d1958bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-2S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:gae5144ae9b86034bb3544fae58d1958bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5e2e8ee4ded27b095564c5d3e034032"><td class="memItemLeft" align="right" valign="top"><a id="gaf5e2e8ee4ded27b095564c5d3e034032"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf5e2e8ee4ded27b095564c5d3e034032">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_2S_2S</a>&#160;&#160;&#160;(0xBCU)</td></tr>
<tr class="memdesc:gaf5e2e8ee4ded27b095564c5d3e034032"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-2S-2S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:gaf5e2e8ee4ded27b095564c5d3e034032"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e8f74b4001e598e2589a2bed306c444"><td class="memItemLeft" align="right" valign="top"><a id="ga5e8f74b4001e598e2589a2bed306c444"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5e8f74b4001e598e2589a2bed306c444">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_4S</a>&#160;&#160;&#160;(0x6CU)</td></tr>
<tr class="memdesc:ga5e8f74b4001e598e2589a2bed306c444"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-4S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga5e8f74b4001e598e2589a2bed306c444"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6131b3874bdafd6ff6d5ed12a5e5e441"><td class="memItemLeft" align="right" valign="top"><a id="ga6131b3874bdafd6ff6d5ed12a5e5e441"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga6131b3874bdafd6ff6d5ed12a5e5e441">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_4S_4S</a>&#160;&#160;&#160;(0xECU)</td></tr>
<tr class="memdesc:ga6131b3874bdafd6ff6d5ed12a5e5e441"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-4S-4S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga6131b3874bdafd6ff6d5ed12a5e5e441"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga140303b6bc3f5eec8b48454d59e05526"><td class="memItemLeft" align="right" valign="top"><a id="ga140303b6bc3f5eec8b48454d59e05526"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga140303b6bc3f5eec8b48454d59e05526">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_1S_8S</a>&#160;&#160;&#160;(0x7CU)</td></tr>
<tr class="memdesc:ga140303b6bc3f5eec8b48454d59e05526"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-8S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga140303b6bc3f5eec8b48454d59e05526"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae9b75c8b85025a901748afa03d86a1a5"><td class="memItemLeft" align="right" valign="top"><a id="gae9b75c8b85025a901748afa03d86a1a5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae9b75c8b85025a901748afa03d86a1a5">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_8S_8S</a>&#160;&#160;&#160;(0xCCU)</td></tr>
<tr class="memdesc:gae9b75c8b85025a901748afa03d86a1a5"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-8S-8S SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:gae9b75c8b85025a901748afa03d86a1a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa3a5a78acd1ee8a2708900dc89c41bd9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa3a5a78acd1ee8a2708900dc89c41bd9">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_4D_4D</a>&#160;&#160;&#160;(0xEEU)</td></tr>
<tr class="memdesc:gaa3a5a78acd1ee8a2708900dc89c41bd9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-4D-4D SMIF fast read with 4-byte addressing.  <a href="#gaa3a5a78acd1ee8a2708900dc89c41bd9">More...</a><br /></td></tr>
<tr class="separator:gaa3a5a78acd1ee8a2708900dc89c41bd9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaac2da17203b7e2957c47a454724316b"><td class="memItemLeft" align="right" valign="top"><a id="gaaac2da17203b7e2957c47a454724316b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaaac2da17203b7e2957c47a454724316b">CY_SMIF_FAST_READ_4_BYTES_CMD_1S_8D_8D</a>&#160;&#160;&#160;(0xFDU)</td></tr>
<tr class="memdesc:gaaac2da17203b7e2957c47a454724316b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-8D-8D SMIF fast read with 4-byte addressing. <br /></td></tr>
<tr class="separator:gaaac2da17203b7e2957c47a454724316b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0083b3642ce349e52349807dff9b0512"><td class="memItemLeft" align="right" valign="top"><a id="ga0083b3642ce349e52349807dff9b0512"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga0083b3642ce349e52349807dff9b0512">CY_SMIF_PAGE_PROGRAM_4_BYTES_CMD_1S_1S_1S</a>&#160;&#160;&#160;(0x12U)</td></tr>
<tr class="memdesc:ga0083b3642ce349e52349807dff9b0512"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-1S SMIF page program with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga0083b3642ce349e52349807dff9b0512"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec9bf5143735106e075f314f8e1cfa52"><td class="memItemLeft" align="right" valign="top"><a id="gaec9bf5143735106e075f314f8e1cfa52"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaec9bf5143735106e075f314f8e1cfa52">CY_SMIF_PAGE_PROGRAM_4_BYTES_CMD_1S_1S_4S</a>&#160;&#160;&#160;(0x34U)</td></tr>
<tr class="memdesc:gaec9bf5143735106e075f314f8e1cfa52"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-4S SMIF page program with 4-byte addressing. <br /></td></tr>
<tr class="separator:gaec9bf5143735106e075f314f8e1cfa52"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga45d90c82639231e4de5d93cbe98b045b"><td class="memItemLeft" align="right" valign="top"><a id="ga45d90c82639231e4de5d93cbe98b045b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga45d90c82639231e4de5d93cbe98b045b">CY_SMIF_PAGE_PROGRAM_4_BYTES_CMD_1S_4S_4S</a>&#160;&#160;&#160;(0x3EU)</td></tr>
<tr class="memdesc:ga45d90c82639231e4de5d93cbe98b045b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-4S-4S SMIF page program with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga45d90c82639231e4de5d93cbe98b045b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9ab2c95a85fe5eba209c1cc2dab18123"><td class="memItemLeft" align="right" valign="top"><a id="ga9ab2c95a85fe5eba209c1cc2dab18123"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga9ab2c95a85fe5eba209c1cc2dab18123">CY_SMIF_PAGE_PROGRAM_4_BYTES_CMD_1S_1S_8S</a>&#160;&#160;&#160;(0x84U)</td></tr>
<tr class="memdesc:ga9ab2c95a85fe5eba209c1cc2dab18123"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-1S-8S SMIF page program with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga9ab2c95a85fe5eba209c1cc2dab18123"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga343ace2b3fa2cf0b5e4c55da5c4329d7"><td class="memItemLeft" align="right" valign="top"><a id="ga343ace2b3fa2cf0b5e4c55da5c4329d7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga343ace2b3fa2cf0b5e4c55da5c4329d7">CY_SMIF_PAGE_PROGRAM_4_BYTES_CMD_1S_8S_8S</a>&#160;&#160;&#160;(0x8EU)</td></tr>
<tr class="memdesc:ga343ace2b3fa2cf0b5e4c55da5c4329d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The command for a 1S-8S-8S SMIF page program with 4-byte addressing. <br /></td></tr>
<tr class="separator:ga343ace2b3fa2cf0b5e4c55da5c4329d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf8c167ff610f0708ebd570c3268fec9"><td class="memItemLeft" align="right" valign="top"><a id="gadf8c167ff610f0708ebd570c3268fec9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gadf8c167ff610f0708ebd570c3268fec9">CY_SMIF_BRWR_EXTADD_MASK</a>&#160;&#160;&#160;(0x80U)</td></tr>
<tr class="memdesc:gadf8c167ff610f0708ebd570c3268fec9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The Extended Address Enable (EXTADD) mask. <br /></td></tr>
<tr class="separator:gadf8c167ff610f0708ebd570c3268fec9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga82eb3748849d5725786fd04fac230297"><td class="memItemLeft" align="right" valign="top"><a id="ga82eb3748849d5725786fd04fac230297"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga82eb3748849d5725786fd04fac230297">CY_SMIF_SFDP_ERASE_TIME_1MS</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:ga82eb3748849d5725786fd04fac230297"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Erase Typical Time in ms. <br /></td></tr>
<tr class="separator:ga82eb3748849d5725786fd04fac230297"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18c8ff6eb935cb7cdf1afcb4cc4b622e"><td class="memItemLeft" align="right" valign="top"><a id="ga18c8ff6eb935cb7cdf1afcb4cc4b622e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga18c8ff6eb935cb7cdf1afcb4cc4b622e">CY_SMIF_SFDP_ERASE_TIME_16MS</a>&#160;&#160;&#160;(16U)</td></tr>
<tr class="memdesc:ga18c8ff6eb935cb7cdf1afcb4cc4b622e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Erase Typical Time in ms. <br /></td></tr>
<tr class="separator:ga18c8ff6eb935cb7cdf1afcb4cc4b622e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2aa33d55100666d0a7a619efbd4eab08"><td class="memItemLeft" align="right" valign="top"><a id="ga2aa33d55100666d0a7a619efbd4eab08"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga2aa33d55100666d0a7a619efbd4eab08">CY_SMIF_SFDP_ERASE_TIME_128MS</a>&#160;&#160;&#160;(128U)</td></tr>
<tr class="memdesc:ga2aa33d55100666d0a7a619efbd4eab08"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Erase Typical Time in ms. <br /></td></tr>
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<tr class="memitem:ga468344f83af29eb9e8d3e7c3fe06d056"><td class="memItemLeft" align="right" valign="top"><a id="ga468344f83af29eb9e8d3e7c3fe06d056"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga468344f83af29eb9e8d3e7c3fe06d056">CY_SMIF_SFDP_ERASE_TIME_1S</a>&#160;&#160;&#160;(1000U)</td></tr>
<tr class="memdesc:ga468344f83af29eb9e8d3e7c3fe06d056"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Erase Typical Time in ms. <br /></td></tr>
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<tr class="memitem:ga3601bfcae438b95a5b4f42ce42695242"><td class="memItemLeft" align="right" valign="top"><a id="ga3601bfcae438b95a5b4f42ce42695242"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga3601bfcae438b95a5b4f42ce42695242">CY_SMIF_SFDP_CHIP_ERASE_TIME_16MS</a>&#160;&#160;&#160;(16U)</td></tr>
<tr class="memdesc:ga3601bfcae438b95a5b4f42ce42695242"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Chip Erase Typical Time in ms. <br /></td></tr>
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<tr class="memitem:ga6945bc87f9792e02ce7d40cfdb45a1e8"><td class="memItemLeft" align="right" valign="top"><a id="ga6945bc87f9792e02ce7d40cfdb45a1e8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga6945bc87f9792e02ce7d40cfdb45a1e8">CY_SMIF_SFDP_CHIP_ERASE_TIME_256MS</a>&#160;&#160;&#160;(256U)</td></tr>
<tr class="memdesc:ga6945bc87f9792e02ce7d40cfdb45a1e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Chip Erase Typical Time in ms. <br /></td></tr>
<tr class="separator:ga6945bc87f9792e02ce7d40cfdb45a1e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf44eb4824ca0c6d9620a7c324693ec62"><td class="memItemLeft" align="right" valign="top"><a id="gaf44eb4824ca0c6d9620a7c324693ec62"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf44eb4824ca0c6d9620a7c324693ec62">CY_SMIF_SFDP_CHIP_ERASE_TIME_4S</a>&#160;&#160;&#160;(4000U)</td></tr>
<tr class="memdesc:gaf44eb4824ca0c6d9620a7c324693ec62"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Chip Erase Typical Time in ms. <br /></td></tr>
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<tr class="memitem:ga5db9ed339abf36c12e2341d1f1704bd3"><td class="memItemLeft" align="right" valign="top"><a id="ga5db9ed339abf36c12e2341d1f1704bd3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5db9ed339abf36c12e2341d1f1704bd3">CY_SMIF_SFDP_CHIP_ERASE_TIME_64S</a>&#160;&#160;&#160;(64000U)</td></tr>
<tr class="memdesc:ga5db9ed339abf36c12e2341d1f1704bd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Chip Erase Typical Time in ms. <br /></td></tr>
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<tr class="memitem:gab22e9d960a4cb095a9996839853ca424"><td class="memItemLeft" align="right" valign="top"><a id="gab22e9d960a4cb095a9996839853ca424"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab22e9d960a4cb095a9996839853ca424">CY_SMIF_SFDP_PROG_TIME_8US</a>&#160;&#160;&#160;(8U)</td></tr>
<tr class="memdesc:gab22e9d960a4cb095a9996839853ca424"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Page Program Typical Time in us. <br /></td></tr>
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<tr class="memitem:ga251b89ab595cf308d4d2998ddf3bc66a"><td class="memItemLeft" align="right" valign="top"><a id="ga251b89ab595cf308d4d2998ddf3bc66a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga251b89ab595cf308d4d2998ddf3bc66a">CY_SMIF_SFDP_PROG_TIME_64US</a>&#160;&#160;&#160;(64U)</td></tr>
<tr class="memdesc:ga251b89ab595cf308d4d2998ddf3bc66a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Page Program Typical Time in us. <br /></td></tr>
<tr class="separator:ga251b89ab595cf308d4d2998ddf3bc66a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga239d76df23030aa693c345dc30630afd"><td class="memItemLeft" align="right" valign="top"><a id="ga239d76df23030aa693c345dc30630afd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga239d76df23030aa693c345dc30630afd">CY_SMIF_SFDP_PROG_TIME_DEFAULT</a>&#160;&#160;&#160;(100000U)</td></tr>
<tr class="memdesc:ga239d76df23030aa693c345dc30630afd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Default Page Program Time in us - 100 ms. <br /></td></tr>
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<tr class="memitem:ga33b955295819b4705f65461934fd540c"><td class="memItemLeft" align="right" valign="top"><a id="ga33b955295819b4705f65461934fd540c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga33b955295819b4705f65461934fd540c">CY_SMIF_SFDP_PAGE_SIZE_DEFAULT</a>&#160;&#160;&#160;(256U)</td></tr>
<tr class="memdesc:ga33b955295819b4705f65461934fd540c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Default Page size used for SFDP 1.0 devices. <br /></td></tr>
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<tr class="memitem:ga5c0da11d05996f54cf0b949893fc903e"><td class="memItemLeft" align="right" valign="top"><a id="ga5c0da11d05996f54cf0b949893fc903e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5c0da11d05996f54cf0b949893fc903e">CY_SMIF_SFDP_UNIT_0</a>&#160;&#160;&#160;(0U)</td></tr>
<tr class="memdesc:ga5c0da11d05996f54cf0b949893fc903e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Basic Flash Parameter Table Time Parameters. <br /></td></tr>
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<tr class="memitem:ga0a1be1de5358f375149a04386831fc03"><td class="memItemLeft" align="right" valign="top"><a id="ga0a1be1de5358f375149a04386831fc03"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga0a1be1de5358f375149a04386831fc03">CY_SMIF_SFDP_UNIT_1</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:ga0a1be1de5358f375149a04386831fc03"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Basic Flash Parameter Table Time Parameters. <br /></td></tr>
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<tr class="memitem:ga7c39f7f764927d03d2f5de66241e2a1c"><td class="memItemLeft" align="right" valign="top"><a id="ga7c39f7f764927d03d2f5de66241e2a1c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga7c39f7f764927d03d2f5de66241e2a1c">CY_SMIF_SFDP_UNIT_2</a>&#160;&#160;&#160;(2U)</td></tr>
<tr class="memdesc:ga7c39f7f764927d03d2f5de66241e2a1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Basic Flash Parameter Table Time Parameters. <br /></td></tr>
<tr class="separator:ga7c39f7f764927d03d2f5de66241e2a1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8172f56cc990274fb26061d9c5057cb0"><td class="memItemLeft" align="right" valign="top"><a id="ga8172f56cc990274fb26061d9c5057cb0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga8172f56cc990274fb26061d9c5057cb0">CY_SMIF_SFDP_UNIT_3</a>&#160;&#160;&#160;(3U)</td></tr>
<tr class="memdesc:ga8172f56cc990274fb26061d9c5057cb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Units of Basic Flash Parameter Table Time Parameters. <br /></td></tr>
<tr class="separator:ga8172f56cc990274fb26061d9c5057cb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga12efe963826d6aa9e240d4a997ac936a"><td class="memItemLeft" align="right" valign="top"><a id="ga12efe963826d6aa9e240d4a997ac936a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga12efe963826d6aa9e240d4a997ac936a">CY_SMIF_STATUS_REG_BUSY_MASK</a>&#160;&#160;&#160;(0x01U)</td></tr>
<tr class="memdesc:ga12efe963826d6aa9e240d4a997ac936a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The busy mask for the status registers. <br /></td></tr>
<tr class="separator:ga12efe963826d6aa9e240d4a997ac936a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e5e2909f9ba1c20b547494be916fa04"><td class="memItemLeft" align="right" valign="top"><a id="ga3e5e2909f9ba1c20b547494be916fa04"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga3e5e2909f9ba1c20b547494be916fa04">CY_SMIF_NO_COMMAND_OR_MODE</a>&#160;&#160;&#160;(0xFFFFFFFFUL)</td></tr>
<tr class="memdesc:ga3e5e2909f9ba1c20b547494be916fa04"><td class="mdescLeft">&#160;</td><td class="mdescRight">No command or mode present. <br /></td></tr>
<tr class="separator:ga3e5e2909f9ba1c20b547494be916fa04"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b05569a97d0d1d5e2961f8e8c19a95e"><td class="memItemLeft" align="right" valign="top"><a id="ga2b05569a97d0d1d5e2961f8e8c19a95e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga2b05569a97d0d1d5e2961f8e8c19a95e">CY_SMIF_SFDP_QE_BIT_1_OF_SR_2</a>&#160;&#160;&#160;(0x02UL)</td></tr>
<tr class="memdesc:ga2b05569a97d0d1d5e2961f8e8c19a95e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The QE is bit 1 of the status register 2. <br /></td></tr>
<tr class="separator:ga2b05569a97d0d1d5e2961f8e8c19a95e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae49c470be557afc6132175a8ca8a8eb8"><td class="memItemLeft" align="right" valign="top"><a id="gae49c470be557afc6132175a8ca8a8eb8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae49c470be557afc6132175a8ca8a8eb8">CY_SMIF_SFDP_QE_BIT_6_OF_SR_1</a>&#160;&#160;&#160;(0x40UL)</td></tr>
<tr class="memdesc:gae49c470be557afc6132175a8ca8a8eb8"><td class="mdescLeft">&#160;</td><td class="mdescRight">The QE is bit 6 of the status register 1. <br /></td></tr>
<tr class="separator:gae49c470be557afc6132175a8ca8a8eb8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5909411f66ed078eff70d5719cab568f"><td class="memItemLeft" align="right" valign="top"><a id="ga5909411f66ed078eff70d5719cab568f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5909411f66ed078eff70d5719cab568f">CY_SMIF_SFDP_QE_BIT_7_OF_SR_2</a>&#160;&#160;&#160;(0x80UL)</td></tr>
<tr class="memdesc:ga5909411f66ed078eff70d5719cab568f"><td class="mdescLeft">&#160;</td><td class="mdescRight">The QE is bit 7 of the status register 2. <br /></td></tr>
<tr class="separator:ga5909411f66ed078eff70d5719cab568f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafca534f0c6860efbebb87fcd6e9329ed"><td class="memItemLeft" align="right" valign="top"><a id="gafca534f0c6860efbebb87fcd6e9329ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gafca534f0c6860efbebb87fcd6e9329ed">CY_SMIF_SFDP_BFPT_BYTE_02</a>&#160;&#160;&#160;(0x02U)</td></tr>
<tr class="memdesc:gafca534f0c6860efbebb87fcd6e9329ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x02 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gafca534f0c6860efbebb87fcd6e9329ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga42cda99f570ad5517e3f6bf66d6a9dca"><td class="memItemLeft" align="right" valign="top"><a id="ga42cda99f570ad5517e3f6bf66d6a9dca"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga42cda99f570ad5517e3f6bf66d6a9dca">CY_SMIF_SFDP_BFPT_BYTE_04</a>&#160;&#160;&#160;(0x04U)</td></tr>
<tr class="memdesc:ga42cda99f570ad5517e3f6bf66d6a9dca"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x04 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga42cda99f570ad5517e3f6bf66d6a9dca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac99e4f6b2d5e8196ac36eb4b3d2f641c"><td class="memItemLeft" align="right" valign="top"><a id="gac99e4f6b2d5e8196ac36eb4b3d2f641c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gac99e4f6b2d5e8196ac36eb4b3d2f641c">CY_SMIF_SFDP_BFPT_BYTE_05</a>&#160;&#160;&#160;(0x05U)</td></tr>
<tr class="memdesc:gac99e4f6b2d5e8196ac36eb4b3d2f641c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x05 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gac99e4f6b2d5e8196ac36eb4b3d2f641c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga136b88e0dedee8e8ee10fb0c1b122c1b"><td class="memItemLeft" align="right" valign="top"><a id="ga136b88e0dedee8e8ee10fb0c1b122c1b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga136b88e0dedee8e8ee10fb0c1b122c1b">CY_SMIF_SFDP_BFPT_BYTE_06</a>&#160;&#160;&#160;(0x06U)</td></tr>
<tr class="memdesc:ga136b88e0dedee8e8ee10fb0c1b122c1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x06 of the JEDEC Basic Flash Parameter Table: number of Parameter Headers (zero based, 05h = 6 parameters) <br /></td></tr>
<tr class="separator:ga136b88e0dedee8e8ee10fb0c1b122c1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf1555bfd5c649a73c8e0da1fa4a6225"><td class="memItemLeft" align="right" valign="top"><a id="gabf1555bfd5c649a73c8e0da1fa4a6225"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gabf1555bfd5c649a73c8e0da1fa4a6225">CY_SMIF_SFDP_BFPT_BYTE_08</a>&#160;&#160;&#160;(0x08U)</td></tr>
<tr class="memdesc:gabf1555bfd5c649a73c8e0da1fa4a6225"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x08 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gabf1555bfd5c649a73c8e0da1fa4a6225"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf451cc45716f34408ee73457896d6f77"><td class="memItemLeft" align="right" valign="top"><a id="gaf451cc45716f34408ee73457896d6f77"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf451cc45716f34408ee73457896d6f77">CY_SMIF_SFDP_BFPT_BYTE_09</a>&#160;&#160;&#160;(0x09U)</td></tr>
<tr class="memdesc:gaf451cc45716f34408ee73457896d6f77"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x09 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gaf451cc45716f34408ee73457896d6f77"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga40db082d489406530f18ae86ec928fff"><td class="memItemLeft" align="right" valign="top"><a id="ga40db082d489406530f18ae86ec928fff"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga40db082d489406530f18ae86ec928fff">CY_SMIF_SFDP_BFPT_BYTE_0A</a>&#160;&#160;&#160;(0x0AU)</td></tr>
<tr class="memdesc:ga40db082d489406530f18ae86ec928fff"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x0A of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga40db082d489406530f18ae86ec928fff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15d2a16b722e8c526195ab751117f24c"><td class="memItemLeft" align="right" valign="top"><a id="ga15d2a16b722e8c526195ab751117f24c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga15d2a16b722e8c526195ab751117f24c">CY_SMIF_SFDP_BFPT_BYTE_0B</a>&#160;&#160;&#160;(0x0BU)</td></tr>
<tr class="memdesc:ga15d2a16b722e8c526195ab751117f24c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x0B of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga15d2a16b722e8c526195ab751117f24c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga265c08b6182889afadf26bc1629c2778"><td class="memItemLeft" align="right" valign="top"><a id="ga265c08b6182889afadf26bc1629c2778"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga265c08b6182889afadf26bc1629c2778">CY_SMIF_SFDP_BFPT_BYTE_0C</a>&#160;&#160;&#160;(0x0CU)</td></tr>
<tr class="memdesc:ga265c08b6182889afadf26bc1629c2778"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x0C of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga265c08b6182889afadf26bc1629c2778"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab60659cd294d72b9508567fe0cf2cae1"><td class="memItemLeft" align="right" valign="top"><a id="gab60659cd294d72b9508567fe0cf2cae1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab60659cd294d72b9508567fe0cf2cae1">CY_SMIF_SFDP_BFPT_BYTE_0D</a>&#160;&#160;&#160;(0x0DU)</td></tr>
<tr class="memdesc:gab60659cd294d72b9508567fe0cf2cae1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x0D of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gab60659cd294d72b9508567fe0cf2cae1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga608acb4e488526d6f1534e33d8971ce7"><td class="memItemLeft" align="right" valign="top"><a id="ga608acb4e488526d6f1534e33d8971ce7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga608acb4e488526d6f1534e33d8971ce7">CY_SMIF_SFDP_BFPT_BYTE_0E</a>&#160;&#160;&#160;(0x0EU)</td></tr>
<tr class="memdesc:ga608acb4e488526d6f1534e33d8971ce7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x0E of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga608acb4e488526d6f1534e33d8971ce7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga346dea68b4c59b2943cb0274c106e8af"><td class="memItemLeft" align="right" valign="top"><a id="ga346dea68b4c59b2943cb0274c106e8af"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga346dea68b4c59b2943cb0274c106e8af">CY_SMIF_SFDP_BFPT_BYTE_0F</a>&#160;&#160;&#160;(0x0FU)</td></tr>
<tr class="memdesc:ga346dea68b4c59b2943cb0274c106e8af"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x0F of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga346dea68b4c59b2943cb0274c106e8af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga835608e9bf17e2acd6069a16947498b3"><td class="memItemLeft" align="right" valign="top"><a id="ga835608e9bf17e2acd6069a16947498b3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga835608e9bf17e2acd6069a16947498b3">CY_SMIF_SFDP_BFPT_BYTE_1C</a>&#160;&#160;&#160;(0x1CU)</td></tr>
<tr class="memdesc:ga835608e9bf17e2acd6069a16947498b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x1C of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga835608e9bf17e2acd6069a16947498b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga74b31cf03725a05da66cea08c1359716"><td class="memItemLeft" align="right" valign="top"><a id="ga74b31cf03725a05da66cea08c1359716"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga74b31cf03725a05da66cea08c1359716">CY_SMIF_SFDP_BFPT_BYTE_1D</a>&#160;&#160;&#160;(0x1DU)</td></tr>
<tr class="memdesc:ga74b31cf03725a05da66cea08c1359716"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x1D of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga74b31cf03725a05da66cea08c1359716"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga56eb4b602c7c27d7be6382054bf7d169"><td class="memItemLeft" align="right" valign="top"><a id="ga56eb4b602c7c27d7be6382054bf7d169"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga56eb4b602c7c27d7be6382054bf7d169">CY_SMIF_SFDP_BFPT_BYTE_23</a>&#160;&#160;&#160;(0x23U)</td></tr>
<tr class="memdesc:ga56eb4b602c7c27d7be6382054bf7d169"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x23 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga56eb4b602c7c27d7be6382054bf7d169"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd4d3726762f56d9d852bde3149c79bd"><td class="memItemLeft" align="right" valign="top"><a id="gadd4d3726762f56d9d852bde3149c79bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gadd4d3726762f56d9d852bde3149c79bd">CY_SMIF_SFDP_BFPT_BYTE_28</a>&#160;&#160;&#160;(0x28U)</td></tr>
<tr class="memdesc:gadd4d3726762f56d9d852bde3149c79bd"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x28 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gadd4d3726762f56d9d852bde3149c79bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaea06268ab2cd9fa0bc110082ca06ad17"><td class="memItemLeft" align="right" valign="top"><a id="gaea06268ab2cd9fa0bc110082ca06ad17"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaea06268ab2cd9fa0bc110082ca06ad17">CY_SMIF_SFDP_BFPT_BYTE_3A</a>&#160;&#160;&#160;(0x3AU)</td></tr>
<tr class="memdesc:gaea06268ab2cd9fa0bc110082ca06ad17"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x3A of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gaea06268ab2cd9fa0bc110082ca06ad17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga17655acead67ff1df92e2a62ecf6c92f"><td class="memItemLeft" align="right" valign="top"><a id="ga17655acead67ff1df92e2a62ecf6c92f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga17655acead67ff1df92e2a62ecf6c92f">CY_SMIF_SFDP_BFPT_BYTE_3C</a>&#160;&#160;&#160;(0x3CU)</td></tr>
<tr class="memdesc:ga17655acead67ff1df92e2a62ecf6c92f"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x3C of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga17655acead67ff1df92e2a62ecf6c92f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga606bbf0d408d034b8a66ded188251177"><td class="memItemLeft" align="right" valign="top"><a id="ga606bbf0d408d034b8a66ded188251177"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga606bbf0d408d034b8a66ded188251177">CY_SMIF_SFDP_BFPT_BYTE_3F</a>&#160;&#160;&#160;(0x3FU)</td></tr>
<tr class="memdesc:ga606bbf0d408d034b8a66ded188251177"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x3F of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga606bbf0d408d034b8a66ded188251177"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0da29e9b3dc2084d852e6a10989ccec9"><td class="memItemLeft" align="right" valign="top"><a id="ga0da29e9b3dc2084d852e6a10989ccec9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga0da29e9b3dc2084d852e6a10989ccec9">CY_SMIF_SFDP_BFPT_BYTE_40</a>&#160;&#160;&#160;(0x40U)</td></tr>
<tr class="memdesc:ga0da29e9b3dc2084d852e6a10989ccec9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x40 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga0da29e9b3dc2084d852e6a10989ccec9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga99b6ce1a564c2900450da3dd1a00aba9"><td class="memItemLeft" align="right" valign="top"><a id="ga99b6ce1a564c2900450da3dd1a00aba9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga99b6ce1a564c2900450da3dd1a00aba9">CY_SMIF_SFDP_BFPT_BYTE_41</a>&#160;&#160;&#160;(0x41U)</td></tr>
<tr class="memdesc:ga99b6ce1a564c2900450da3dd1a00aba9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x41 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga99b6ce1a564c2900450da3dd1a00aba9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaedd1667e1f3f73378b362f18b1e56c28"><td class="memItemLeft" align="right" valign="top"><a id="gaedd1667e1f3f73378b362f18b1e56c28"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaedd1667e1f3f73378b362f18b1e56c28">CY_SMIF_SFDP_BFPT_BYTE_42</a>&#160;&#160;&#160;(0x42U)</td></tr>
<tr class="memdesc:gaedd1667e1f3f73378b362f18b1e56c28"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x42 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gaedd1667e1f3f73378b362f18b1e56c28"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae7200cc4051ca186df3fd883fc065625"><td class="memItemLeft" align="right" valign="top"><a id="gae7200cc4051ca186df3fd883fc065625"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae7200cc4051ca186df3fd883fc065625">CY_SMIF_SFDP_BFPT_BYTE_43</a>&#160;&#160;&#160;(0x43U)</td></tr>
<tr class="memdesc:gae7200cc4051ca186df3fd883fc065625"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 0x43 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:gae7200cc4051ca186df3fd883fc065625"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e2dc8ecd5b753b85059e23972b009f5"><td class="memItemLeft" align="right" valign="top"><a id="ga1e2dc8ecd5b753b85059e23972b009f5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1e2dc8ecd5b753b85059e23972b009f5">CY_SMIF_SFDP_BFPT_ERASE_BYTE</a>&#160;&#160;&#160;(36U)</td></tr>
<tr class="memdesc:ga1e2dc8ecd5b753b85059e23972b009f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">The byte 36 of the JEDEC Basic Flash Parameter Table. <br /></td></tr>
<tr class="separator:ga1e2dc8ecd5b753b85059e23972b009f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga40c1a3af427bbc8056ae00bfc1b16c15"><td class="memItemLeft" align="right" valign="top"><a id="ga40c1a3af427bbc8056ae00bfc1b16c15"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga40c1a3af427bbc8056ae00bfc1b16c15">CY_SMIF_JEDEC_BFPT_10TH_DWORD</a>&#160;&#160;&#160;(9U)</td></tr>
<tr class="memdesc:ga40c1a3af427bbc8056ae00bfc1b16c15"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset to JEDEC Basic Flash Parameter Table: 10th DWORD. <br /></td></tr>
<tr class="separator:ga40c1a3af427bbc8056ae00bfc1b16c15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5474ec9962cfc24a68f24a1b8b4362c"><td class="memItemLeft" align="right" valign="top"><a id="gaa5474ec9962cfc24a68f24a1b8b4362c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa5474ec9962cfc24a68f24a1b8b4362c">CY_SMIF_JEDEC_BFPT_11TH_DWORD</a>&#160;&#160;&#160;(10U)</td></tr>
<tr class="memdesc:gaa5474ec9962cfc24a68f24a1b8b4362c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Offset to JEDEC Basic Flash Parameter Table: 11th DWORD. <br /></td></tr>
<tr class="separator:gaa5474ec9962cfc24a68f24a1b8b4362c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7abb95d4e2c57a2a184bc54d4745db7d"><td class="memItemLeft" align="right" valign="top"><a id="ga7abb95d4e2c57a2a184bc54d4745db7d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga7abb95d4e2c57a2a184bc54d4745db7d">CY_SMIF_SFDP_SCCR_MAP_BYTE_3B</a>&#160;&#160;&#160;(0x3BU)</td></tr>
<tr class="memdesc:ga7abb95d4e2c57a2a184bc54d4745db7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">DWORD-16 of SCCR Map SPI table. <br /></td></tr>
<tr class="separator:ga7abb95d4e2c57a2a184bc54d4745db7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab007f10a8b1a6d9c32a39b799ec7a74e"><td class="memItemLeft" align="right" valign="top"><a id="gab007f10a8b1a6d9c32a39b799ec7a74e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab007f10a8b1a6d9c32a39b799ec7a74e">CY_SMIF_SFDP_OCTAL_ENABLE_WRITE_CMD_Pos</a>&#160;&#160;&#160;(0U)</td></tr>
<tr class="memdesc:gab007f10a8b1a6d9c32a39b799ec7a74e"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable write command position. <br /></td></tr>
<tr class="separator:gab007f10a8b1a6d9c32a39b799ec7a74e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga622b32ee84d685969b3c74eebf160354"><td class="memItemLeft" align="right" valign="top"><a id="ga622b32ee84d685969b3c74eebf160354"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga622b32ee84d685969b3c74eebf160354">CY_SMIF_SFDP_OCTAL_ENABLE_WRITE_CMD_Msk</a>&#160;&#160;&#160;(0xFFU)</td></tr>
<tr class="memdesc:ga622b32ee84d685969b3c74eebf160354"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable write command mask. <br /></td></tr>
<tr class="separator:ga622b32ee84d685969b3c74eebf160354"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25c08a505e1830e8eaf0308eb8e790eb"><td class="memItemLeft" align="right" valign="top"><a id="ga25c08a505e1830e8eaf0308eb8e790eb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga25c08a505e1830e8eaf0308eb8e790eb">CY_SMIF_SFDP_OCTAL_ENABLE_READ_CMD_Pos</a>&#160;&#160;&#160;(8U)</td></tr>
<tr class="memdesc:ga25c08a505e1830e8eaf0308eb8e790eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable read command position. <br /></td></tr>
<tr class="separator:ga25c08a505e1830e8eaf0308eb8e790eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9a9d162dd08a2915731f7df1be3e71dc"><td class="memItemLeft" align="right" valign="top"><a id="ga9a9d162dd08a2915731f7df1be3e71dc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga9a9d162dd08a2915731f7df1be3e71dc">CY_SMIF_SFDP_OCTAL_ENABLE_READ_CMD_Msk</a>&#160;&#160;&#160;(0xFF00U)</td></tr>
<tr class="memdesc:ga9a9d162dd08a2915731f7df1be3e71dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable read command mask. <br /></td></tr>
<tr class="separator:ga9a9d162dd08a2915731f7df1be3e71dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga252ebb6447d2f43a499d8f6b85888501"><td class="memItemLeft" align="right" valign="top"><a id="ga252ebb6447d2f43a499d8f6b85888501"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga252ebb6447d2f43a499d8f6b85888501">CY_SMIF_SFDP_OCTAL_ENABLE_REG_ADDR_Pos</a>&#160;&#160;&#160;(16U)</td></tr>
<tr class="memdesc:ga252ebb6447d2f43a499d8f6b85888501"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable register address position. <br /></td></tr>
<tr class="separator:ga252ebb6447d2f43a499d8f6b85888501"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3f03b32833cbbf5a304f2451ff995b1d"><td class="memItemLeft" align="right" valign="top"><a id="ga3f03b32833cbbf5a304f2451ff995b1d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga3f03b32833cbbf5a304f2451ff995b1d">CY_SMIF_SFDP_OCTAL_ENABLE_REG_ADDR_Msk</a>&#160;&#160;&#160;(0xFF0000U)</td></tr>
<tr class="memdesc:ga3f03b32833cbbf5a304f2451ff995b1d"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable register address mask. <br /></td></tr>
<tr class="separator:ga3f03b32833cbbf5a304f2451ff995b1d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1c3974b10fcc8ce58afd0b29bea8db29"><td class="memItemLeft" align="right" valign="top"><a id="ga1c3974b10fcc8ce58afd0b29bea8db29"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1c3974b10fcc8ce58afd0b29bea8db29">CY_SMIF_SFDP_OCTAL_ENABLE_BIT_Pos</a>&#160;&#160;&#160;(24U)</td></tr>
<tr class="memdesc:ga1c3974b10fcc8ce58afd0b29bea8db29"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable bit position. <br /></td></tr>
<tr class="separator:ga1c3974b10fcc8ce58afd0b29bea8db29"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5ff0c5f3e84ee40c3cda2918e8e77fa"><td class="memItemLeft" align="right" valign="top"><a id="gac5ff0c5f3e84ee40c3cda2918e8e77fa"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gac5ff0c5f3e84ee40c3cda2918e8e77fa">CY_SMIF_SFDP_OCTAL_ENABLE_BIT_Msk</a>&#160;&#160;&#160;(0x7000000U)</td></tr>
<tr class="memdesc:gac5ff0c5f3e84ee40c3cda2918e8e77fa"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable bit mask. <br /></td></tr>
<tr class="separator:gac5ff0c5f3e84ee40c3cda2918e8e77fa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf19e0c9a040f8041d5715bb6dc4c438"><td class="memItemLeft" align="right" valign="top"><a id="gabf19e0c9a040f8041d5715bb6dc4c438"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gabf19e0c9a040f8041d5715bb6dc4c438">CY_SMIF_SFDP_OCTAL_ENABLE_USE_ADDRESS_Pos</a>&#160;&#160;&#160;(28U)</td></tr>
<tr class="memdesc:gabf19e0c9a040f8041d5715bb6dc4c438"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable uses address to set/clear position. <br /></td></tr>
<tr class="separator:gabf19e0c9a040f8041d5715bb6dc4c438"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga938394103ffa48463400c4d2bbc0b0e6"><td class="memItemLeft" align="right" valign="top"><a id="ga938394103ffa48463400c4d2bbc0b0e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga938394103ffa48463400c4d2bbc0b0e6">CY_SMIF_SFDP_OCTAL_ENABLE_USE_ADDRESS_Msk</a>&#160;&#160;&#160;(0x10000000U)</td></tr>
<tr class="memdesc:ga938394103ffa48463400c4d2bbc0b0e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable uses address to set/clear mask. <br /></td></tr>
<tr class="separator:ga938394103ffa48463400c4d2bbc0b0e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba266187da19624edf63d8a6282d52ec"><td class="memItemLeft" align="right" valign="top"><a id="gaba266187da19624edf63d8a6282d52ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaba266187da19624edf63d8a6282d52ec">CY_SMIF_SFDP_OCTAL_ENABLE_BIT_SUPPORT_Pos</a>&#160;&#160;&#160;(31U)</td></tr>
<tr class="memdesc:gaba266187da19624edf63d8a6282d52ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable bit support position. <br /></td></tr>
<tr class="separator:gaba266187da19624edf63d8a6282d52ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4358a6e93c6977315e051e6100f4aba1"><td class="memItemLeft" align="right" valign="top"><a id="ga4358a6e93c6977315e051e6100f4aba1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4358a6e93c6977315e051e6100f4aba1">CY_SMIF_SFDP_OCTAL_ENABLE_BIT_SUPPORT_Msk</a>&#160;&#160;&#160;(0x80000000U)</td></tr>
<tr class="memdesc:ga4358a6e93c6977315e051e6100f4aba1"><td class="mdescLeft">&#160;</td><td class="mdescRight">SCCR Map DWORD-16 Octal mode enable bit support mask. <br /></td></tr>
<tr class="separator:ga4358a6e93c6977315e051e6100f4aba1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga113ec499051b5821117f5499beac1fdf"><td class="memItemLeft" align="right" valign="top"><a id="ga113ec499051b5821117f5499beac1fdf"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga113ec499051b5821117f5499beac1fdf">CY_SMIF_SFDP_SECTOR_MAP_CMD_OFFSET</a>&#160;&#160;&#160;(1UL)</td></tr>
<tr class="memdesc:ga113ec499051b5821117f5499beac1fdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">The offset for the detection command instruction in the Sector Map command descriptor. <br /></td></tr>
<tr class="separator:ga113ec499051b5821117f5499beac1fdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6683cf17f171ed357d977920e3ca1dbc"><td class="memItemLeft" align="right" valign="top"><a id="ga6683cf17f171ed357d977920e3ca1dbc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga6683cf17f171ed357d977920e3ca1dbc">CY_SMIF_SFDP_SECTOR_MAP_ADDR_LEN_OFFSET</a>&#160;&#160;&#160;(2UL)</td></tr>
<tr class="memdesc:ga6683cf17f171ed357d977920e3ca1dbc"><td class="mdescLeft">&#160;</td><td class="mdescRight">The offset for the detection command address length in the Sector Map command descriptor. <br /></td></tr>
<tr class="separator:ga6683cf17f171ed357d977920e3ca1dbc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga709195ca12c6b0d8189eeaf48d6b68f6"><td class="memItemLeft" align="right" valign="top"><a id="ga709195ca12c6b0d8189eeaf48d6b68f6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga709195ca12c6b0d8189eeaf48d6b68f6">CY_SMIF_SFDP_SECTOR_MAP_REG_MSK_OFFSET</a>&#160;&#160;&#160;(3UL)</td></tr>
<tr class="memdesc:ga709195ca12c6b0d8189eeaf48d6b68f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">The offset for the read data mask in the Sector Map command descriptor. <br /></td></tr>
<tr class="separator:ga709195ca12c6b0d8189eeaf48d6b68f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac69f4454ce0651d107333eee3d6b8b00"><td class="memItemLeft" align="right" valign="top"><a id="gac69f4454ce0651d107333eee3d6b8b00"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gac69f4454ce0651d107333eee3d6b8b00">CY_SMIF_SFDP_SECTOR_MAP_REG_ADDR_OFFSET</a>&#160;&#160;&#160;(4UL)</td></tr>
<tr class="memdesc:gac69f4454ce0651d107333eee3d6b8b00"><td class="mdescLeft">&#160;</td><td class="mdescRight">The offset for the detection command address in the Sector Map command descriptor. <br /></td></tr>
<tr class="separator:gac69f4454ce0651d107333eee3d6b8b00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga51d4511baa7f6db39857f78bd7d0f88e"><td class="memItemLeft" align="right" valign="top"><a id="ga51d4511baa7f6db39857f78bd7d0f88e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga51d4511baa7f6db39857f78bd7d0f88e">CY_SMIF_SFDP_SECTOR_MAP_REGION_COUNT_OFFSET</a>&#160;&#160;&#160;(2UL)</td></tr>
<tr class="memdesc:ga51d4511baa7f6db39857f78bd7d0f88e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The offset for the regions count in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:ga51d4511baa7f6db39857f78bd7d0f88e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga686a30380cd9684e2a717e38f2b07b3d"><td class="memItemLeft" align="right" valign="top"><a id="ga686a30380cd9684e2a717e38f2b07b3d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga686a30380cd9684e2a717e38f2b07b3d">CY_SMIF_SFDP_SECTOR_MAP_CONFIG_ID_OFFSET</a>&#160;&#160;&#160;(2UL)</td></tr>
<tr class="memdesc:ga686a30380cd9684e2a717e38f2b07b3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The offset for the configuration ID in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:ga686a30380cd9684e2a717e38f2b07b3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf06eeafc0ab7222531efecbb2b74f98"><td class="memItemLeft" align="right" valign="top"><a id="gabf06eeafc0ab7222531efecbb2b74f98"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gabf06eeafc0ab7222531efecbb2b74f98">CY_SMIF_SFDP_SECTOR_MAP_SUPPORTED_ET_MASK</a>&#160;&#160;&#160;(0xFU)</td></tr>
<tr class="memdesc:gabf06eeafc0ab7222531efecbb2b74f98"><td class="mdescLeft">&#160;</td><td class="mdescRight">The mask for the supported erase type code in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:gabf06eeafc0ab7222531efecbb2b74f98"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1e23cad8a7cdc5e1d53468eef51c856c"><td class="memItemLeft" align="right" valign="top"><a id="ga1e23cad8a7cdc5e1d53468eef51c856c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1e23cad8a7cdc5e1d53468eef51c856c">CY_SMIF_SFDP_SECTOR_MAP_ADDR_BYTES_Msk</a>&#160;&#160;&#160;(0xC0UL)</td></tr>
<tr class="memdesc:ga1e23cad8a7cdc5e1d53468eef51c856c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The mask for the configuration detection command address bytes in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:ga1e23cad8a7cdc5e1d53468eef51c856c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab6cca3c46a2cc81d3e97a111fd6a8710"><td class="memItemLeft" align="right" valign="top"><a id="gab6cca3c46a2cc81d3e97a111fd6a8710"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab6cca3c46a2cc81d3e97a111fd6a8710">CY_SMIF_SFDP_SECTOR_MAP_ADDR_BYTES_Pos</a>&#160;&#160;&#160;(6UL)</td></tr>
<tr class="memdesc:gab6cca3c46a2cc81d3e97a111fd6a8710"><td class="mdescLeft">&#160;</td><td class="mdescRight">The position of the configuration detection command address bytes in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:gab6cca3c46a2cc81d3e97a111fd6a8710"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae6cacb0e57c8afa5e865aa70996e2d8a"><td class="memItemLeft" align="right" valign="top"><a id="gae6cacb0e57c8afa5e865aa70996e2d8a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae6cacb0e57c8afa5e865aa70996e2d8a">CY_SMIF_SFDP_SECTOR_MAP_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0xFUL)</td></tr>
<tr class="memdesc:gae6cacb0e57c8afa5e865aa70996e2d8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The mask for the configuration detection command read latency cycles in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:gae6cacb0e57c8afa5e865aa70996e2d8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf72c28a143a07771e8f921b1169bedad"><td class="memItemLeft" align="right" valign="top"><a id="gaf72c28a143a07771e8f921b1169bedad"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf72c28a143a07771e8f921b1169bedad">CY_SMIF_SFDP_SECTOR_MAP_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:gaf72c28a143a07771e8f921b1169bedad"><td class="mdescLeft">&#160;</td><td class="mdescRight">The position of the configuration detection command read latency cycles in the Sector Map descriptor. <br /></td></tr>
<tr class="separator:gaf72c28a143a07771e8f921b1169bedad"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca738ad4e05937ad0933ab114975a20c"><td class="memItemLeft" align="right" valign="top"><a id="gaca738ad4e05937ad0933ab114975a20c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaca738ad4e05937ad0933ab114975a20c">FOUR_BYTE_ADDRESS_TABLE_BYTE_0</a>&#160;&#160;&#160;(0U)</td></tr>
<tr class="memdesc:gaca738ad4e05937ad0933ab114975a20c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte 0x00 of the JEDEC 4-byte Address Instruction Table. <br /></td></tr>
<tr class="separator:gaca738ad4e05937ad0933ab114975a20c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f4c5fa6db020c65530f053d375a3b4b"><td class="memItemLeft" align="right" valign="top"><a id="ga8f4c5fa6db020c65530f053d375a3b4b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga8f4c5fa6db020c65530f053d375a3b4b">FOUR_BYTE_ADDRESS_TABLE_BYTE_1</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:ga8f4c5fa6db020c65530f053d375a3b4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte 0x01 of the JEDEC 4-byte Address Instruction Table. <br /></td></tr>
<tr class="separator:ga8f4c5fa6db020c65530f053d375a3b4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga58ada0218709ff50c7932251290f978c"><td class="memItemLeft" align="right" valign="top"><a id="ga58ada0218709ff50c7932251290f978c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga58ada0218709ff50c7932251290f978c">CY_SMIF_SFDP_FAST_READ_1_1_4_Pos</a>&#160;&#160;&#160;(6UL)</td></tr>
<tr class="memdesc:ga58ada0218709ff50c7932251290f978c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-1-4 fast read support (Bit 6) <br /></td></tr>
<tr class="separator:ga58ada0218709ff50c7932251290f978c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24378aa8c2c7a734fd12bc80cce55fe8"><td class="memItemLeft" align="right" valign="top"><a id="ga24378aa8c2c7a734fd12bc80cce55fe8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga24378aa8c2c7a734fd12bc80cce55fe8">CY_SMIF_SFDP_FAST_READ_1_1_4_Msk</a>&#160;&#160;&#160;(0x40UL)</td></tr>
<tr class="memdesc:ga24378aa8c2c7a734fd12bc80cce55fe8"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-1-4 fast read support (Bitfield-Mask: 0x01) <br /></td></tr>
<tr class="separator:ga24378aa8c2c7a734fd12bc80cce55fe8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab87a4465ba7bc05e7036f67dd865712e"><td class="memItemLeft" align="right" valign="top"><a id="gab87a4465ba7bc05e7036f67dd865712e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab87a4465ba7bc05e7036f67dd865712e">CY_SMIF_SFDP_FAST_READ_1_4_4_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:gab87a4465ba7bc05e7036f67dd865712e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-4-4 fast read support (Bit 5) <br /></td></tr>
<tr class="separator:gab87a4465ba7bc05e7036f67dd865712e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacaacf1a8d60bc5818037913e2dc49563"><td class="memItemLeft" align="right" valign="top"><a id="gacaacf1a8d60bc5818037913e2dc49563"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gacaacf1a8d60bc5818037913e2dc49563">CY_SMIF_SFDP_FAST_READ_1_4_4_Msk</a>&#160;&#160;&#160;(0x20UL)</td></tr>
<tr class="memdesc:gacaacf1a8d60bc5818037913e2dc49563"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-4-4 fast read support (Bitfield-Mask: 0x01) <br /></td></tr>
<tr class="separator:gacaacf1a8d60bc5818037913e2dc49563"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad09971f329a27db767058d499b779f34"><td class="memItemLeft" align="right" valign="top"><a id="gad09971f329a27db767058d499b779f34"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gad09971f329a27db767058d499b779f34">CY_SMIF_SFDP_FAST_READ_1_2_2_Pos</a>&#160;&#160;&#160;(4UL)</td></tr>
<tr class="memdesc:gad09971f329a27db767058d499b779f34"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-2-2 fast read support (Bit 4) <br /></td></tr>
<tr class="separator:gad09971f329a27db767058d499b779f34"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa3bed2a4eb3ae137f7ee7e0121603702"><td class="memItemLeft" align="right" valign="top"><a id="gaa3bed2a4eb3ae137f7ee7e0121603702"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa3bed2a4eb3ae137f7ee7e0121603702">CY_SMIF_SFDP_FAST_READ_1_2_2_Msk</a>&#160;&#160;&#160;(0x10UL)</td></tr>
<tr class="memdesc:gaa3bed2a4eb3ae137f7ee7e0121603702"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-2-2 fast read support (Bitfield-Mask: 0x01) <br /></td></tr>
<tr class="separator:gaa3bed2a4eb3ae137f7ee7e0121603702"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga81b01bc9296ab4e961ad7239c29847f7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga81b01bc9296ab4e961ad7239c29847f7">CY_SMIF_SFDP_DTR_SUPPORT_Pos</a>&#160;&#160;&#160;(3UL)</td></tr>
<tr class="memdesc:ga81b01bc9296ab4e961ad7239c29847f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP DTR support (Bit 3)  <a href="#ga81b01bc9296ab4e961ad7239c29847f7">More...</a><br /></td></tr>
<tr class="separator:ga81b01bc9296ab4e961ad7239c29847f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1cc77e7796dcd5269426a772b5c878f1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1cc77e7796dcd5269426a772b5c878f1">CY_SMIF_SFDP_DTR_SUPPORT_Msk</a>&#160;&#160;&#160;(0x08UL)</td></tr>
<tr class="memdesc:ga1cc77e7796dcd5269426a772b5c878f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP DTR support (Bitfield-Mask: 0x08)  <a href="#ga1cc77e7796dcd5269426a772b5c878f1">More...</a><br /></td></tr>
<tr class="separator:ga1cc77e7796dcd5269426a772b5c878f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0493f76643b1793f1f4f541c9319b389"><td class="memItemLeft" align="right" valign="top"><a id="ga0493f76643b1793f1f4f541c9319b389"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga0493f76643b1793f1f4f541c9319b389">CY_SMIF_SFDP_ADDRESS_BYTES_Pos</a>&#160;&#160;&#160;(1UL)</td></tr>
<tr class="memdesc:ga0493f76643b1793f1f4f541c9319b389"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of address bytes (Bit 1) <br /></td></tr>
<tr class="separator:ga0493f76643b1793f1f4f541c9319b389"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27f627f8419b7265fa0a00b5dc442d1b"><td class="memItemLeft" align="right" valign="top"><a id="ga27f627f8419b7265fa0a00b5dc442d1b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga27f627f8419b7265fa0a00b5dc442d1b">CY_SMIF_SFDP_ADDRESS_BYTES_Msk</a>&#160;&#160;&#160;(0x06UL)</td></tr>
<tr class="memdesc:ga27f627f8419b7265fa0a00b5dc442d1b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of address bytes (Bitfield-Mask: 0x03) <br /></td></tr>
<tr class="separator:ga27f627f8419b7265fa0a00b5dc442d1b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa394b32bb6f3475aa149659b86131459"><td class="memItemLeft" align="right" valign="top"><a id="gaa394b32bb6f3475aa149659b86131459"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa394b32bb6f3475aa149659b86131459">CY_SMIF_SFDP_FAST_READ_1_1_2_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:gaa394b32bb6f3475aa149659b86131459"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-1-2 fast read support (Bit 0) <br /></td></tr>
<tr class="separator:gaa394b32bb6f3475aa149659b86131459"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0d632800ce612ae1afb199d1daed4b1"><td class="memItemLeft" align="right" valign="top"><a id="gad0d632800ce612ae1afb199d1daed4b1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gad0d632800ce612ae1afb199d1daed4b1">CY_SMIF_SFDP_FAST_READ_1_1_2_Msk</a>&#160;&#160;&#160;(0x01UL)</td></tr>
<tr class="memdesc:gad0d632800ce612ae1afb199d1daed4b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-1-2 fast read support (Bitfield-Mask: 0x01) <br /></td></tr>
<tr class="separator:gad0d632800ce612ae1afb199d1daed4b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43417542cdc2bf3ebee25d0e9ed67fdd"><td class="memItemLeft" align="right" valign="top"><a id="ga43417542cdc2bf3ebee25d0e9ed67fdd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga43417542cdc2bf3ebee25d0e9ed67fdd">CY_SMIF_SFDP_SIZE_ABOVE_4GB_Msk</a>&#160;&#160;&#160;(0x80000000UL)</td></tr>
<tr class="memdesc:ga43417542cdc2bf3ebee25d0e9ed67fdd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flash memory density bit define if it &gt;= 4 Gbit or &lt;= 2Gbit. <br /></td></tr>
<tr class="separator:ga43417542cdc2bf3ebee25d0e9ed67fdd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga440627562691b95590a744ae25537da4"><td class="memItemLeft" align="right" valign="top"><a id="ga440627562691b95590a744ae25537da4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga440627562691b95590a744ae25537da4">CY_SMIF_SFDP_1_4_4_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga440627562691b95590a744ae25537da4"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-4-4 fast read dummy cycles (Bit 0) <br /></td></tr>
<tr class="separator:ga440627562691b95590a744ae25537da4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaffb1169c522c1ddcede20d66a5451f3f"><td class="memItemLeft" align="right" valign="top"><a id="gaffb1169c522c1ddcede20d66a5451f3f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaffb1169c522c1ddcede20d66a5451f3f">CY_SMIF_SFDP_1_4_4_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0x1FUL)</td></tr>
<tr class="memdesc:gaffb1169c522c1ddcede20d66a5451f3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-4-4 fast read dummy cycles (Bitfield-Mask: 0x1F) <br /></td></tr>
<tr class="separator:gaffb1169c522c1ddcede20d66a5451f3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5c4ba71418c7d15f80cb2af0c35a269b"><td class="memItemLeft" align="right" valign="top"><a id="ga5c4ba71418c7d15f80cb2af0c35a269b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5c4ba71418c7d15f80cb2af0c35a269b">CY_SMIF_SFDP_1_4_4_MODE_CYCLES_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:ga5c4ba71418c7d15f80cb2af0c35a269b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-4-4 fast read mode cycles (Bit 5) <br /></td></tr>
<tr class="separator:ga5c4ba71418c7d15f80cb2af0c35a269b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga890e50bd8133625d8b109475eb93b7e3"><td class="memItemLeft" align="right" valign="top"><a id="ga890e50bd8133625d8b109475eb93b7e3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga890e50bd8133625d8b109475eb93b7e3">CY_SMIF_SFDP_1_4_4_MODE_CYCLES_Msk</a>&#160;&#160;&#160;(0xE0UL)</td></tr>
<tr class="memdesc:ga890e50bd8133625d8b109475eb93b7e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-4-4 fast read mode cycles (Bitfield-Mask: 0x07) <br /></td></tr>
<tr class="separator:ga890e50bd8133625d8b109475eb93b7e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga38dca33f98d9c1e24eecc4f926aac14c"><td class="memItemLeft" align="right" valign="top"><a id="ga38dca33f98d9c1e24eecc4f926aac14c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga38dca33f98d9c1e24eecc4f926aac14c">CY_SMIF_SFDP_1_1_4_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga38dca33f98d9c1e24eecc4f926aac14c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-1-4 fast read dummy cycles (Bit 0) <br /></td></tr>
<tr class="separator:ga38dca33f98d9c1e24eecc4f926aac14c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d315797122a41219328675bf1e401b1"><td class="memItemLeft" align="right" valign="top"><a id="ga8d315797122a41219328675bf1e401b1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga8d315797122a41219328675bf1e401b1">CY_SMIF_SFDP_1_1_4_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0x1FUL)</td></tr>
<tr class="memdesc:ga8d315797122a41219328675bf1e401b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-1-4 fast read dummy cycles (Bitfield-Mask: 0x1F) <br /></td></tr>
<tr class="separator:ga8d315797122a41219328675bf1e401b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4842068179a6b32987e3823085a75fd8"><td class="memItemLeft" align="right" valign="top"><a id="ga4842068179a6b32987e3823085a75fd8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4842068179a6b32987e3823085a75fd8">CY_SMIF_SFDP_1_1_4_MODE_CYCLES_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:ga4842068179a6b32987e3823085a75fd8"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-1-4 fast read mode cycles (Bit 5) <br /></td></tr>
<tr class="separator:ga4842068179a6b32987e3823085a75fd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga462e21af9a56dbd9aff7c18e99c66db9"><td class="memItemLeft" align="right" valign="top"><a id="ga462e21af9a56dbd9aff7c18e99c66db9"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga462e21af9a56dbd9aff7c18e99c66db9">CY_SMIF_SFDP_1_1_4_MODE_CYCLES_Msk</a>&#160;&#160;&#160;(0xE0UL)</td></tr>
<tr class="memdesc:ga462e21af9a56dbd9aff7c18e99c66db9"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-1-4 fast read mode cycles (Bitfield-Mask: 0x07) <br /></td></tr>
<tr class="separator:ga462e21af9a56dbd9aff7c18e99c66db9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabf74f871433ae34b54557701c83ff4fb"><td class="memItemLeft" align="right" valign="top"><a id="gabf74f871433ae34b54557701c83ff4fb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gabf74f871433ae34b54557701c83ff4fb">CY_SMIF_SFDP_1_1_2_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:gabf74f871433ae34b54557701c83ff4fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_1_2 fast read dummy cycles (Bit 0) <br /></td></tr>
<tr class="separator:gabf74f871433ae34b54557701c83ff4fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa4ba2734fef25e6daca2a0abcc7f26e0"><td class="memItemLeft" align="right" valign="top"><a id="gaa4ba2734fef25e6daca2a0abcc7f26e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa4ba2734fef25e6daca2a0abcc7f26e0">CY_SMIF_SFDP_1_1_2_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0x1FUL)</td></tr>
<tr class="memdesc:gaa4ba2734fef25e6daca2a0abcc7f26e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_1_2 fast read dummy cycles (Bitfield-Mask: 0x1F) <br /></td></tr>
<tr class="separator:gaa4ba2734fef25e6daca2a0abcc7f26e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96ce3b17246641dcce9c40ed32cdeefe"><td class="memItemLeft" align="right" valign="top"><a id="ga96ce3b17246641dcce9c40ed32cdeefe"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga96ce3b17246641dcce9c40ed32cdeefe">CY_SMIF_SFDP_1_1_2_MODE_CYCLES_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:ga96ce3b17246641dcce9c40ed32cdeefe"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_1_2 fast read mode cycles (Bit 5) <br /></td></tr>
<tr class="separator:ga96ce3b17246641dcce9c40ed32cdeefe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad8ff6d22659f926a64da86c43dcd3d2b"><td class="memItemLeft" align="right" valign="top"><a id="gad8ff6d22659f926a64da86c43dcd3d2b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gad8ff6d22659f926a64da86c43dcd3d2b">CY_SMIF_SFDP_1_1_2_MODE_CYCLES_Msk</a>&#160;&#160;&#160;(0xE0UL)</td></tr>
<tr class="memdesc:gad8ff6d22659f926a64da86c43dcd3d2b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_1_2 fast read mode cycles (Bitfield-Mask: 0x07) <br /></td></tr>
<tr class="separator:gad8ff6d22659f926a64da86c43dcd3d2b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ce46798289fb2fc5461c9a22eee0478"><td class="memItemLeft" align="right" valign="top"><a id="ga4ce46798289fb2fc5461c9a22eee0478"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4ce46798289fb2fc5461c9a22eee0478">CY_SMIF_SFDP_1_2_2_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga4ce46798289fb2fc5461c9a22eee0478"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_2_2 fast read dummy cycles (Bit 0) <br /></td></tr>
<tr class="separator:ga4ce46798289fb2fc5461c9a22eee0478"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga284f0e68c4cfbfa2cd46cc1dfee3612d"><td class="memItemLeft" align="right" valign="top"><a id="ga284f0e68c4cfbfa2cd46cc1dfee3612d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga284f0e68c4cfbfa2cd46cc1dfee3612d">CY_SMIF_SFDP_1_2_2_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0x1FUL)</td></tr>
<tr class="memdesc:ga284f0e68c4cfbfa2cd46cc1dfee3612d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_2_2 fast read dummy cycles (Bitfield-Mask: 0x1F) <br /></td></tr>
<tr class="separator:ga284f0e68c4cfbfa2cd46cc1dfee3612d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8e95778657a0824267d9268a2b83c51"><td class="memItemLeft" align="right" valign="top"><a id="gaf8e95778657a0824267d9268a2b83c51"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf8e95778657a0824267d9268a2b83c51">CY_SMIF_SFDP_1_2_2_MODE_CYCLES_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:gaf8e95778657a0824267d9268a2b83c51"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_2_2 fast read mode cycles (Bit 5) <br /></td></tr>
<tr class="separator:gaf8e95778657a0824267d9268a2b83c51"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66b6fc832759c24d8ee18035ded29274"><td class="memItemLeft" align="right" valign="top"><a id="ga66b6fc832759c24d8ee18035ded29274"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga66b6fc832759c24d8ee18035ded29274">CY_SMIF_SFDP_1_2_2_MODE_CYCLES_Msk</a>&#160;&#160;&#160;(0xE0UL)</td></tr>
<tr class="memdesc:ga66b6fc832759c24d8ee18035ded29274"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_2_2 fast read mode cycles (Bitfield-Mask: 0x07) <br /></td></tr>
<tr class="separator:ga66b6fc832759c24d8ee18035ded29274"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga732e871ae494c5678ee75e80dbe24e86"><td class="memItemLeft" align="right" valign="top"><a id="ga732e871ae494c5678ee75e80dbe24e86"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga732e871ae494c5678ee75e80dbe24e86">CY_SMIF_SFDP_ERASE_T1_COUNT_Pos</a>&#160;&#160;&#160;(4UL)</td></tr>
<tr class="memdesc:ga732e871ae494c5678ee75e80dbe24e86"><td class="mdescLeft">&#160;</td><td class="mdescRight">Erase Type 1 Erase, Typical time: count (Bits 8:4) <br /></td></tr>
<tr class="separator:ga732e871ae494c5678ee75e80dbe24e86"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga735a15cbb123a72f633105fced607be2"><td class="memItemLeft" align="right" valign="top"><a id="ga735a15cbb123a72f633105fced607be2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga735a15cbb123a72f633105fced607be2">CY_SMIF_SFDP_ERASE_T1_COUNT_Msk</a>&#160;&#160;&#160;(0x1F0UL)</td></tr>
<tr class="memdesc:ga735a15cbb123a72f633105fced607be2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Erase Type 1 Erase, Typical time: count (Bitfield-Mask ) <br /></td></tr>
<tr class="separator:ga735a15cbb123a72f633105fced607be2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04331867453bd14da6ad6c049137381a"><td class="memItemLeft" align="right" valign="top"><a id="ga04331867453bd14da6ad6c049137381a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga04331867453bd14da6ad6c049137381a">CY_SMIF_SFDP_ERASE_T1_UNITS_Pos</a>&#160;&#160;&#160;(9UL)</td></tr>
<tr class="memdesc:ga04331867453bd14da6ad6c049137381a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Erase Type 1 Erase, Typical time: units (Bits 10:9) <br /></td></tr>
<tr class="separator:ga04331867453bd14da6ad6c049137381a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac65882d43acdea992df53925715a4cdb"><td class="memItemLeft" align="right" valign="top"><a id="gac65882d43acdea992df53925715a4cdb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gac65882d43acdea992df53925715a4cdb">CY_SMIF_SFDP_ERASE_T1_UNITS_Msk</a>&#160;&#160;&#160;(0x600UL)</td></tr>
<tr class="memdesc:gac65882d43acdea992df53925715a4cdb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Erase Type 1 Erase, Typical time: units (Bitfield-Mask ) <br /></td></tr>
<tr class="separator:gac65882d43acdea992df53925715a4cdb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad27a8bf35f4bb4d1ce91662ab32af44f"><td class="memItemLeft" align="right" valign="top"><a id="gad27a8bf35f4bb4d1ce91662ab32af44f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gad27a8bf35f4bb4d1ce91662ab32af44f">CY_SMIF_SFDP_ERASE_MUL_COUNT_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:gad27a8bf35f4bb4d1ce91662ab32af44f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplier from typical erase time to maximum erase time (Bits 3:0) <br /></td></tr>
<tr class="separator:gad27a8bf35f4bb4d1ce91662ab32af44f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga67675c0a3622bbc5473a590661f6c536"><td class="memItemLeft" align="right" valign="top"><a id="ga67675c0a3622bbc5473a590661f6c536"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga67675c0a3622bbc5473a590661f6c536">CY_SMIF_SFDP_ERASE_MUL_COUNT_Msk</a>&#160;&#160;&#160;(0x0FUL)</td></tr>
<tr class="memdesc:ga67675c0a3622bbc5473a590661f6c536"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplier from typical erase time to maximum erase time (Bitfield-Mask ) <br /></td></tr>
<tr class="separator:ga67675c0a3622bbc5473a590661f6c536"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ba5ac949fd8632f323955bde857635b"><td class="memItemLeft" align="right" valign="top"><a id="ga7ba5ac949fd8632f323955bde857635b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga7ba5ac949fd8632f323955bde857635b">CY_SMIF_SFDP_PAGE_SIZE_Pos</a>&#160;&#160;&#160;(4UL)</td></tr>
<tr class="memdesc:ga7ba5ac949fd8632f323955bde857635b"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP page size (Bit 4) <br /></td></tr>
<tr class="separator:ga7ba5ac949fd8632f323955bde857635b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7090042d43c9caebc63b0cc39d55b1e1"><td class="memItemLeft" align="right" valign="top"><a id="ga7090042d43c9caebc63b0cc39d55b1e1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga7090042d43c9caebc63b0cc39d55b1e1">CY_SMIF_SFDP_PAGE_SIZE_Msk</a>&#160;&#160;&#160;(0xF0UL)</td></tr>
<tr class="memdesc:ga7090042d43c9caebc63b0cc39d55b1e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP page size (Bitfield-Mask: 0x0F) <br /></td></tr>
<tr class="separator:ga7090042d43c9caebc63b0cc39d55b1e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7bec0831b2090c41bd5c6dc7d6f2cabc"><td class="memItemLeft" align="right" valign="top"><a id="ga7bec0831b2090c41bd5c6dc7d6f2cabc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga7bec0831b2090c41bd5c6dc7d6f2cabc">CY_SMIF_SFDP_PAGE_PROG_COUNT_Pos</a>&#160;&#160;&#160;(8UL)</td></tr>
<tr class="memdesc:ga7bec0831b2090c41bd5c6dc7d6f2cabc"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Page Program Typical time: count (Bits 12:8) <br /></td></tr>
<tr class="separator:ga7bec0831b2090c41bd5c6dc7d6f2cabc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga35ee28a27c0e2b4931fe7ae69e8458ac"><td class="memItemLeft" align="right" valign="top"><a id="ga35ee28a27c0e2b4931fe7ae69e8458ac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga35ee28a27c0e2b4931fe7ae69e8458ac">CY_SMIF_SFDP_PAGE_PROG_COUNT_Msk</a>&#160;&#160;&#160;(0x1F00UL)</td></tr>
<tr class="memdesc:ga35ee28a27c0e2b4931fe7ae69e8458ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Page Program Typical time: count (Bitfield-Mask) <br /></td></tr>
<tr class="separator:ga35ee28a27c0e2b4931fe7ae69e8458ac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf95a4c876cef07995bbe252df7ec880a"><td class="memItemLeft" align="right" valign="top"><a id="gaf95a4c876cef07995bbe252df7ec880a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf95a4c876cef07995bbe252df7ec880a">CY_SMIF_SFDP_PAGE_PROG_UNITS_Pos</a>&#160;&#160;&#160;(13UL)</td></tr>
<tr class="memdesc:gaf95a4c876cef07995bbe252df7ec880a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Page Program Typical time: units (Bit 13) <br /></td></tr>
<tr class="separator:gaf95a4c876cef07995bbe252df7ec880a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga489cac9def7c9b7a445924012ad7caec"><td class="memItemLeft" align="right" valign="top"><a id="ga489cac9def7c9b7a445924012ad7caec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga489cac9def7c9b7a445924012ad7caec">CY_SMIF_SFDP_PAGE_PROG_UNITS_Msk</a>&#160;&#160;&#160;(0x2000UL)</td></tr>
<tr class="memdesc:ga489cac9def7c9b7a445924012ad7caec"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Page Program Typical time: units (Bitfield-Mask) <br /></td></tr>
<tr class="separator:ga489cac9def7c9b7a445924012ad7caec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5eed0becaf79a8eeb6c1bde93f51daa0"><td class="memItemLeft" align="right" valign="top"><a id="ga5eed0becaf79a8eeb6c1bde93f51daa0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5eed0becaf79a8eeb6c1bde93f51daa0">CY_SMIF_SFDP_CHIP_ERASE_COUNT_Pos</a>&#160;&#160;&#160;(24UL)</td></tr>
<tr class="memdesc:ga5eed0becaf79a8eeb6c1bde93f51daa0"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Erase Typical time: count (Bits 28:24) <br /></td></tr>
<tr class="separator:ga5eed0becaf79a8eeb6c1bde93f51daa0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga18244e4cbf5b13141d7b52f597391aa0"><td class="memItemLeft" align="right" valign="top"><a id="ga18244e4cbf5b13141d7b52f597391aa0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga18244e4cbf5b13141d7b52f597391aa0">CY_SMIF_SFDP_CHIP_ERASE_COUNT_Msk</a>&#160;&#160;&#160;(0x1F000000UL)</td></tr>
<tr class="memdesc:ga18244e4cbf5b13141d7b52f597391aa0"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Erase Typical time: count (Bitfield-Mask) <br /></td></tr>
<tr class="separator:ga18244e4cbf5b13141d7b52f597391aa0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaeac21b169c63bcb035e09d8ddf9e3047"><td class="memItemLeft" align="right" valign="top"><a id="gaeac21b169c63bcb035e09d8ddf9e3047"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaeac21b169c63bcb035e09d8ddf9e3047">CY_SMIF_SFDP_CHIP_ERASE_UNITS_Pos</a>&#160;&#160;&#160;(29UL)</td></tr>
<tr class="memdesc:gaeac21b169c63bcb035e09d8ddf9e3047"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Erase Typical time: units (Bits 29:30) <br /></td></tr>
<tr class="separator:gaeac21b169c63bcb035e09d8ddf9e3047"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1108836938ed123af619505066975713"><td class="memItemLeft" align="right" valign="top"><a id="ga1108836938ed123af619505066975713"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1108836938ed123af619505066975713">CY_SMIF_SFDP_CHIP_ERASE_UNITS_Msk</a>&#160;&#160;&#160;(0x60000000UL)</td></tr>
<tr class="memdesc:ga1108836938ed123af619505066975713"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP Chip Erase Typical time: units (Bitfield-Mask) <br /></td></tr>
<tr class="separator:ga1108836938ed123af619505066975713"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga568f34f2665927465467c645dd9d9ef4"><td class="memItemLeft" align="right" valign="top"><a id="ga568f34f2665927465467c645dd9d9ef4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga568f34f2665927465467c645dd9d9ef4">CY_SMIF_SFDP_PROG_MUL_COUNT_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga568f34f2665927465467c645dd9d9ef4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplier from typical time to max time for Page or byte program (Bits 3:0) <br /></td></tr>
<tr class="separator:ga568f34f2665927465467c645dd9d9ef4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4ba5490eb17b54631430cf1f0d4ecfac"><td class="memItemLeft" align="right" valign="top"><a id="ga4ba5490eb17b54631430cf1f0d4ecfac"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4ba5490eb17b54631430cf1f0d4ecfac">CY_SMIF_SFDP_PROG_MUL_COUNT_Msk</a>&#160;&#160;&#160;(0x0FUL)</td></tr>
<tr class="memdesc:ga4ba5490eb17b54631430cf1f0d4ecfac"><td class="mdescLeft">&#160;</td><td class="mdescRight">Multiplier from typical time to max time for Page or byte program (Bitfield-Mask) <br /></td></tr>
<tr class="separator:ga4ba5490eb17b54631430cf1f0d4ecfac"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3f098e8dbd669ff96f998aa39119e7c"><td class="memItemLeft" align="right" valign="top"><a id="gae3f098e8dbd669ff96f998aa39119e7c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae3f098e8dbd669ff96f998aa39119e7c">CY_SMIF_SFDP_QE_REQUIREMENTS_Pos</a>&#160;&#160;&#160;(4UL)</td></tr>
<tr class="memdesc:gae3f098e8dbd669ff96f998aa39119e7c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP quad enable requirements field (Bit 4) <br /></td></tr>
<tr class="separator:gae3f098e8dbd669ff96f998aa39119e7c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2cbe5d3d58393050e07c9327de388ac8"><td class="memItemLeft" align="right" valign="top"><a id="ga2cbe5d3d58393050e07c9327de388ac8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga2cbe5d3d58393050e07c9327de388ac8">CY_SMIF_SFDP_QE_REQUIREMENTS_Msk</a>&#160;&#160;&#160;(0x70UL)</td></tr>
<tr class="memdesc:ga2cbe5d3d58393050e07c9327de388ac8"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP quad enable requirements field (Bitfield-Mask: 0x07) <br /></td></tr>
<tr class="separator:ga2cbe5d3d58393050e07c9327de388ac8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5788521d484790552c8b467a054bc39b"><td class="memItemLeft" align="right" valign="top"><a id="ga5788521d484790552c8b467a054bc39b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga5788521d484790552c8b467a054bc39b">CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_B7</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:ga5788521d484790552c8b467a054bc39b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Issue 0xB7 instruction. <br /></td></tr>
<tr class="separator:ga5788521d484790552c8b467a054bc39b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa7043c6a7f472a8265aecca9693a5742"><td class="memItemLeft" align="right" valign="top"><a id="gaa7043c6a7f472a8265aecca9693a5742"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa7043c6a7f472a8265aecca9693a5742">CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_WR_EN_B7</a>&#160;&#160;&#160;(2U)</td></tr>
<tr class="memdesc:gaa7043c6a7f472a8265aecca9693a5742"><td class="mdescLeft">&#160;</td><td class="mdescRight">Issue write enable instruction followed with 0xB7. <br /></td></tr>
<tr class="separator:gaa7043c6a7f472a8265aecca9693a5742"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga806651ccb9533f763f95660f71c1632a"><td class="memItemLeft" align="right" valign="top"><a id="ga806651ccb9533f763f95660f71c1632a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga806651ccb9533f763f95660f71c1632a">CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_ALWAYS_4_BYTE</a>&#160;&#160;&#160;(0x40U)</td></tr>
<tr class="memdesc:ga806651ccb9533f763f95660f71c1632a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory always operates in 4-byte mode. <br /></td></tr>
<tr class="separator:ga806651ccb9533f763f95660f71c1632a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga303321aceb0b9761a38656001231e391"><td class="memItemLeft" align="right" valign="top"><a id="ga303321aceb0b9761a38656001231e391"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga303321aceb0b9761a38656001231e391">CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_B7_CMD</a>&#160;&#160;&#160;(0xB7U)</td></tr>
<tr class="memdesc:ga303321aceb0b9761a38656001231e391"><td class="mdescLeft">&#160;</td><td class="mdescRight">The instruction required to enter 4-byte addressing mode. <br /></td></tr>
<tr class="separator:ga303321aceb0b9761a38656001231e391"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga609c102b92bd0eafb857d0d14d1ed74b"><td class="memItemLeft" align="right" valign="top"><a id="ga609c102b92bd0eafb857d0d14d1ed74b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga609c102b92bd0eafb857d0d14d1ed74b">CY_SMIF_SFDP_ENTER_4_BYTE_METHOD_SUPPORTED_MASK</a>&#160;&#160;&#160;(0x7FU)</td></tr>
<tr class="memdesc:ga609c102b92bd0eafb857d0d14d1ed74b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask indicating 4-byte address mode entry supported. <br /></td></tr>
<tr class="separator:ga609c102b92bd0eafb857d0d14d1ed74b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66ac43d98ffed0b35f10ecda653f287d"><td class="memItemLeft" align="right" valign="top"><a id="ga66ac43d98ffed0b35f10ecda653f287d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga66ac43d98ffed0b35f10ecda653f287d">CY_SMIF_SFDP_FAST_READ_1_1_8_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga66ac43d98ffed0b35f10ecda653f287d"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-1-8 fast read support (Bitfield 24:31) <br /></td></tr>
<tr class="separator:ga66ac43d98ffed0b35f10ecda653f287d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga622bffeb23020e70faeed9b088c613e0"><td class="memItemLeft" align="right" valign="top"><a id="ga622bffeb23020e70faeed9b088c613e0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga622bffeb23020e70faeed9b088c613e0">CY_SMIF_SFDP_FAST_READ_1_1_8_Msk</a>&#160;&#160;&#160;(0xFFUL)</td></tr>
<tr class="memdesc:ga622bffeb23020e70faeed9b088c613e0"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-1-8 fast read support (Bitfield-Mask: 0xFF) <br /></td></tr>
<tr class="separator:ga622bffeb23020e70faeed9b088c613e0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64fe880442343ee79c04bd99fc9c81dc"><td class="memItemLeft" align="right" valign="top"><a id="ga64fe880442343ee79c04bd99fc9c81dc"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga64fe880442343ee79c04bd99fc9c81dc">CY_SMIF_SFDP_1_1_8_MODE_CYCLES_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:ga64fe880442343ee79c04bd99fc9c81dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-1-8 fast read mode cycles (Bitfield 21:23) <br /></td></tr>
<tr class="separator:ga64fe880442343ee79c04bd99fc9c81dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaab05f0d69adabecd5c4cf348f4d92110"><td class="memItemLeft" align="right" valign="top"><a id="gaab05f0d69adabecd5c4cf348f4d92110"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaab05f0d69adabecd5c4cf348f4d92110">CY_SMIF_SFDP_1_1_8_MODE_CYCLES_Msk</a>&#160;&#160;&#160;(0xE0UL)</td></tr>
<tr class="memdesc:gaab05f0d69adabecd5c4cf348f4d92110"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-1-8 fast read mode cycles (Bitfield-Mask: 0xE) <br /></td></tr>
<tr class="separator:gaab05f0d69adabecd5c4cf348f4d92110"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga334f31566d5bdf3befffd2dde617a6d5"><td class="memItemLeft" align="right" valign="top"><a id="ga334f31566d5bdf3befffd2dde617a6d5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga334f31566d5bdf3befffd2dde617a6d5">CY_SMIF_SFDP_1_1_8_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga334f31566d5bdf3befffd2dde617a6d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_1_8 fast read dummy cycles (Bit 16:19) <br /></td></tr>
<tr class="separator:ga334f31566d5bdf3befffd2dde617a6d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga307346f0cafaf56418f4710ea096312c"><td class="memItemLeft" align="right" valign="top"><a id="ga307346f0cafaf56418f4710ea096312c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga307346f0cafaf56418f4710ea096312c">CY_SMIF_SFDP_1_1_8_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0x1FUL)</td></tr>
<tr class="memdesc:ga307346f0cafaf56418f4710ea096312c"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_1_8 fast read dummy cycles (Bitfield-Mask: 0x1F) <br /></td></tr>
<tr class="separator:ga307346f0cafaf56418f4710ea096312c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga866a062e30a2899c7761f48d97491f58"><td class="memItemLeft" align="right" valign="top"><a id="ga866a062e30a2899c7761f48d97491f58"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga866a062e30a2899c7761f48d97491f58">CY_SMIF_SFDP_FAST_READ_1_8_8_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga866a062e30a2899c7761f48d97491f58"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-8-8 fast read support (Bitfield 8:15) <br /></td></tr>
<tr class="separator:ga866a062e30a2899c7761f48d97491f58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8170c829f8617c3c5caee933e53309b5"><td class="memItemLeft" align="right" valign="top"><a id="ga8170c829f8617c3c5caee933e53309b5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga8170c829f8617c3c5caee933e53309b5">CY_SMIF_SFDP_FAST_READ_1_8_8_Msk</a>&#160;&#160;&#160;(0xFFUL)</td></tr>
<tr class="memdesc:ga8170c829f8617c3c5caee933e53309b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP 1-8-8 fast read support (Bitfield-Mask: 0xFF) <br /></td></tr>
<tr class="separator:ga8170c829f8617c3c5caee933e53309b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabd9a2cc6e3df44c995e7a49cf6c65d0a"><td class="memItemLeft" align="right" valign="top"><a id="gabd9a2cc6e3df44c995e7a49cf6c65d0a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gabd9a2cc6e3df44c995e7a49cf6c65d0a">CY_SMIF_SFDP_1_8_8_MODE_CYCLES_Pos</a>&#160;&#160;&#160;(5UL)</td></tr>
<tr class="memdesc:gabd9a2cc6e3df44c995e7a49cf6c65d0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-8-8 fast read mode cycles (Bitfield 5:7) <br /></td></tr>
<tr class="separator:gabd9a2cc6e3df44c995e7a49cf6c65d0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0c2f89f85b724ff9497d267676241ed0"><td class="memItemLeft" align="right" valign="top"><a id="ga0c2f89f85b724ff9497d267676241ed0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga0c2f89f85b724ff9497d267676241ed0">CY_SMIF_SFDP_1_8_8_MODE_CYCLES_Msk</a>&#160;&#160;&#160;(0xE0UL)</td></tr>
<tr class="memdesc:ga0c2f89f85b724ff9497d267676241ed0"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1-8-8 fast read mode cycles (Bitfield-Mask: 0xE) <br /></td></tr>
<tr class="separator:ga0c2f89f85b724ff9497d267676241ed0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1931fb66510d8417ca201290f2f8950a"><td class="memItemLeft" align="right" valign="top"><a id="ga1931fb66510d8417ca201290f2f8950a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga1931fb66510d8417ca201290f2f8950a">CY_SMIF_SFDP_1_8_8_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga1931fb66510d8417ca201290f2f8950a"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_8_8 fast read dummy cycles (Bit 0:4) <br /></td></tr>
<tr class="separator:ga1931fb66510d8417ca201290f2f8950a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae83bbd18cfb8ac0413997377b3952695"><td class="memItemLeft" align="right" valign="top"><a id="gae83bbd18cfb8ac0413997377b3952695"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gae83bbd18cfb8ac0413997377b3952695">CY_SMIF_SFDP_1_8_8_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0x1FUL)</td></tr>
<tr class="memdesc:gae83bbd18cfb8ac0413997377b3952695"><td class="mdescLeft">&#160;</td><td class="mdescRight">The SFDP number of 1_8_8 fast read dummy cycles (Bitfield-Mask: 0x1F) <br /></td></tr>
<tr class="separator:gae83bbd18cfb8ac0413997377b3952695"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d8acf45f171ce7284688cc156c2b486"><td class="memItemLeft" align="right" valign="top"><a id="ga9d8acf45f171ce7284688cc156c2b486"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga9d8acf45f171ce7284688cc156c2b486">CY_SMIF_SFDP_OCTAL_ENABE_BIT_Pos</a>&#160;&#160;&#160;(20UL)</td></tr>
<tr class="memdesc:ga9d8acf45f171ce7284688cc156c2b486"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal Enable bit present in the flash or not (Bitfiled 20:22) <br /></td></tr>
<tr class="separator:ga9d8acf45f171ce7284688cc156c2b486"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf54d1b20fe873e2d13880b70fa651084"><td class="memItemLeft" align="right" valign="top"><a id="gaf54d1b20fe873e2d13880b70fa651084"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf54d1b20fe873e2d13880b70fa651084">CY_SMIF_SFDP_OCTAL_ENABE_BIT_Msk</a>&#160;&#160;&#160;(0x700000)</td></tr>
<tr class="memdesc:gaf54d1b20fe873e2d13880b70fa651084"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal Enable bit present Mask (Bitfiled-Mask 0x7) <br /></td></tr>
<tr class="separator:gaf54d1b20fe873e2d13880b70fa651084"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab1b2112e83f4d5398209d5ef3d0bc129"><td class="memItemLeft" align="right" valign="top"><a id="gab1b2112e83f4d5398209d5ef3d0bc129"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab1b2112e83f4d5398209d5ef3d0bc129">XSPI_PROFILE_1_TABLE_BYTE_0</a>&#160;&#160;&#160;(0U)</td></tr>
<tr class="memdesc:gab1b2112e83f4d5398209d5ef3d0bc129"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte 0x00 of the JEDEC xSPI Profile 1.0. <br /></td></tr>
<tr class="separator:gab1b2112e83f4d5398209d5ef3d0bc129"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf42254959c4cc5fb5a3bc4b1fc97c149"><td class="memItemLeft" align="right" valign="top"><a id="gaf42254959c4cc5fb5a3bc4b1fc97c149"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf42254959c4cc5fb5a3bc4b1fc97c149">XSPI_PROFILE_1_TABLE_BYTE_1</a>&#160;&#160;&#160;(1U)</td></tr>
<tr class="memdesc:gaf42254959c4cc5fb5a3bc4b1fc97c149"><td class="mdescLeft">&#160;</td><td class="mdescRight">Byte 0x01 of the JEDEC xSPI Profile 1.0. <br /></td></tr>
<tr class="separator:gaf42254959c4cc5fb5a3bc4b1fc97c149"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e5dd915c932f974bca42bc86c015f00"><td class="memItemLeft" align="right" valign="top"><a id="ga3e5dd915c932f974bca42bc86c015f00"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga3e5dd915c932f974bca42bc86c015f00">XSPI_PROFILE_1_TABLE_BYTE_16</a>&#160;&#160;&#160;(0x10U)</td></tr>
<tr class="memdesc:ga3e5dd915c932f974bca42bc86c015f00"><td class="mdescLeft">&#160;</td><td class="mdescRight">DWORD 5 =&gt; Byte 16 of the JEDEC xSPI Profile 1.0. <br /></td></tr>
<tr class="separator:ga3e5dd915c932f974bca42bc86c015f00"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga641a821b7cadaa9bad323cd50fc1a1d9">CY_SMIF_SFDP_OCTAL_DDR_READ_CMD_Pos</a>&#160;&#160;&#160;(0UL)</td></tr>
<tr class="memdesc:ga641a821b7cadaa9bad323cd50fc1a1d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR 8D-8D-8D read command support position (Bitfield 8:15) <br /></td></tr>
<tr class="separator:ga641a821b7cadaa9bad323cd50fc1a1d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaa312e1172a9201b39a12953fd0d2590e">CY_SMIF_SFDP_OCTAL_DDR_READ_CMD_Msk</a>&#160;&#160;&#160;(0xFFUL)</td></tr>
<tr class="memdesc:gaa312e1172a9201b39a12953fd0d2590e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR 8D-8D-8D read command support Mask Bitfield-Mask: 0xFF00) <br /></td></tr>
<tr class="separator:gaa312e1172a9201b39a12953fd0d2590e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab78ea88c4681568e5ce301e5e3b2bb10"><td class="memItemLeft" align="right" valign="top"><a id="gab78ea88c4681568e5ce301e5e3b2bb10"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gab78ea88c4681568e5ce301e5e3b2bb10">CY_SMIF_SFDP_ODDR_166MHZ_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(27UL)</td></tr>
<tr class="memdesc:gab78ea88c4681568e5ce301e5e3b2bb10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR 8D-8D-8D dummy cycles for 166 Mhz (Bitfield 27:31) <br /></td></tr>
<tr class="separator:gab78ea88c4681568e5ce301e5e3b2bb10"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaee4add23d1507a1e5e84c36b615bef00">CY_SMIF_SFDP_ODDR_166MHZ_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0xF8000000UL)</td></tr>
<tr class="memdesc:gaee4add23d1507a1e5e84c36b615bef00"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR 8D-8D-8D dummy cycles for 166 Mhz Mask. <br /></td></tr>
<tr class="separator:gaee4add23d1507a1e5e84c36b615bef00"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga829acf30e2efec7c06271351c392a207"><td class="memItemLeft" align="right" valign="top"><a id="ga829acf30e2efec7c06271351c392a207"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga829acf30e2efec7c06271351c392a207">CY_SMIF_SFDP_ODDR_200MHZ_DUMMY_CYCLES_Pos</a>&#160;&#160;&#160;(7UL)</td></tr>
<tr class="memdesc:ga829acf30e2efec7c06271351c392a207"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR 8D-8D-8D dummy cycles for 200 Mhz (Bitfield 7:11) <br /></td></tr>
<tr class="separator:ga829acf30e2efec7c06271351c392a207"><td class="memSeparator" colspan="2">&#160;</td></tr>
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#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gac7a2ba9784e52a099b73bd02815a5f01">CY_SMIF_SFDP_ODDR_200MHZ_DUMMY_CYCLES_Msk</a>&#160;&#160;&#160;(0xF80UL)</td></tr>
<tr class="memdesc:gac7a2ba9784e52a099b73bd02815a5f01"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR 8D-8D-8D dummy cycles for 200 Mhz Mask. <br /></td></tr>
<tr class="separator:gac7a2ba9784e52a099b73bd02815a5f01"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga20b032145230c2da01c2a5d636c2e51f"><td class="memItemLeft" align="right" valign="top"><a id="ga20b032145230c2da01c2a5d636c2e51f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga20b032145230c2da01c2a5d636c2e51f">CMD_SEQ_OCTAL_DDR_CMD1_LEN_BYTE_OFFSET</a>&#160;&#160;&#160;(3U)</td></tr>
<tr class="memdesc:ga20b032145230c2da01c2a5d636c2e51f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR enable command 1 sequence length byte offset. <br /></td></tr>
<tr class="separator:ga20b032145230c2da01c2a5d636c2e51f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5675a0f006c4dcd625c858511efd2e4"><td class="memItemLeft" align="right" valign="top"><a id="gac5675a0f006c4dcd625c858511efd2e4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gac5675a0f006c4dcd625c858511efd2e4">CMD_SEQ_OCTAL_DDR_CMD2_LEN_BYTE_OFFSET</a>&#160;&#160;&#160;(11U)</td></tr>
<tr class="memdesc:gac5675a0f006c4dcd625c858511efd2e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR enable command 1 sequence length byte offset. <br /></td></tr>
<tr class="separator:gac5675a0f006c4dcd625c858511efd2e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf40c3dbb29ba65b88ae0480eb2cf1e14"><td class="memItemLeft" align="right" valign="top"><a id="gaf40c3dbb29ba65b88ae0480eb2cf1e14"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#gaf40c3dbb29ba65b88ae0480eb2cf1e14">CY_SMIF_SFDP_ODDR_CMD_SEQ_MAX_LEN</a>&#160;&#160;&#160;(8U)</td></tr>
<tr class="memdesc:gaf40c3dbb29ba65b88ae0480eb2cf1e14"><td class="mdescLeft">&#160;</td><td class="mdescRight">Octal DDR enable command sequence maximum length. <br /></td></tr>
<tr class="separator:gaf40c3dbb29ba65b88ae0480eb2cf1e14"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3a409102a18b6eae84109b46a4c828b0"><td class="memItemLeft" align="right" valign="top"><a id="ga3a409102a18b6eae84109b46a4c828b0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga3a409102a18b6eae84109b46a4c828b0">CY_SMIF_TAP_NOT_FOUND</a>&#160;&#160;&#160;0xFFU</td></tr>
<tr class="memdesc:ga3a409102a18b6eae84109b46a4c828b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay tap matching to memory not found. <br /></td></tr>
<tr class="separator:ga3a409102a18b6eae84109b46a4c828b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d75f7f56c3bef3f44d3c0e385f0272d"><td class="memItemLeft" align="right" valign="top"><a id="ga4d75f7f56c3bef3f44d3c0e385f0272d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__smif__macros__sfdp.html#ga4d75f7f56c3bef3f44d3c0e385f0272d">CY_SMIF_MEM_CALIBRATION_DATA_PATTERN_LENGTH</a>&#160;&#160;&#160;12U</td></tr>
<tr class="memdesc:ga4d75f7f56c3bef3f44d3c0e385f0272d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pattern length used for memory read transaction calibration. <br /></td></tr>
<tr class="separator:ga4d75f7f56c3bef3f44d3c0e385f0272d"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a id="ga1453d020a9d108e42e8ee54226484141"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1453d020a9d108e42e8ee54226484141">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_SIGNATURE_BYTE_00</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_SIGNATURE_BYTE_00&#160;&#160;&#160;(0x00U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP Signature byte 0x00. </p>
<p>Should be "S" </p>

</div>
</div>
<a id="ga4d1419f86779c2a0166142b985e2dbf6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga4d1419f86779c2a0166142b985e2dbf6">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_SIGNATURE_BYTE_01</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_SIGNATURE_BYTE_01&#160;&#160;&#160;(0x01U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP Signature byte 0x01. </p>
<p>Should be "F" </p>

</div>
</div>
<a id="ga9ab446e14424e00ea85a9ae1ff812580"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga9ab446e14424e00ea85a9ae1ff812580">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_SIGNATURE_BYTE_02</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_SIGNATURE_BYTE_02&#160;&#160;&#160;(0x02U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP Signature byte 0x02. </p>
<p>Should be "D" </p>

</div>
</div>
<a id="ga484207a690e23be78908f64f2a62693e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga484207a690e23be78908f64f2a62693e">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_SIGNATURE_BYTE_03</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_SIGNATURE_BYTE_03&#160;&#160;&#160;(0x03U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP Signature byte 0x03. </p>
<p>Should be "P" </p>

</div>
</div>
<a id="gaf4b7ccd5f4cc2072dc86e156636711f6"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaf4b7ccd5f4cc2072dc86e156636711f6">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_MINOR_REV</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_MINOR_REV&#160;&#160;&#160;(0x04U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP Header byte 0x04. </p>
<p>Defines the JEDEC JESD216 Revision </p>

</div>
</div>
<a id="ga6303482034d832e3571ad9bb8887b853"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga6303482034d832e3571ad9bb8887b853">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_MAJOR_REV</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_MAJOR_REV&#160;&#160;&#160;(0x05U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP Header byte 0x05. </p>
<p>Defines the SFDP Major Revision </p>

</div>
</div>
<a id="gaa76d00c38b3a1f63f81aaa0275cf5557"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa76d00c38b3a1f63f81aaa0275cf5557">&#9670;&nbsp;</a></span>CY_SMIF_QE_BIT_STATUS_REG2_T1</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_QE_BIT_STATUS_REG2_T1&#160;&#160;&#160;(0x02U)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The QE bit is in status register 2 type 1. </p>
<p>It should be written as the second byte. </p>

</div>
</div>
<a id="gaa3a5a78acd1ee8a2708900dc89c41bd9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gaa3a5a78acd1ee8a2708900dc89c41bd9">&#9670;&nbsp;</a></span>CY_SMIF_FAST_READ_4_BYTES_CMD_1S_4D_4D</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_FAST_READ_4_BYTES_CMD_1S_4D_4D&#160;&#160;&#160;(0xEEU)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The command for a 1S-4D-4D SMIF fast read with 4-byte addressing. </p>
<dl class="section note"><dt>Note</dt><dd>This macro is available for CAT1B, CAT1C and CAT1D devices. </dd></dl>

</div>
</div>
<a id="ga81b01bc9296ab4e961ad7239c29847f7"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga81b01bc9296ab4e961ad7239c29847f7">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_DTR_SUPPORT_Pos</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_DTR_SUPPORT_Pos&#160;&#160;&#160;(3UL)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP DTR support (Bit 3) </p>
<dl class="section note"><dt>Note</dt><dd>This macro is available for CAT1B, CAT1C and CAT1D devices. </dd></dl>

</div>
</div>
<a id="ga1cc77e7796dcd5269426a772b5c878f1"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ga1cc77e7796dcd5269426a772b5c878f1">&#9670;&nbsp;</a></span>CY_SMIF_SFDP_DTR_SUPPORT_Msk</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define CY_SMIF_SFDP_DTR_SUPPORT_Msk&#160;&#160;&#160;(0x08UL)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>The SFDP DTR support (Bitfield-Mask: 0x08) </p>
<dl class="section note"><dt>Note</dt><dd>This macro is available for CAT1B, CAT1C and CAT1D devices. </dd></dl>

</div>
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